Searched refs:NumSubRegs (Results 1 – 3 of 3) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 81 unsigned NumSubRegs; member
120 NumSubRegs = SplitParts.empty() ? 1 : SplitParts.size(); in SGPRSpillBuilder()
140 Data.NumVGPRs = (NumSubRegs + (Data.PerVGPR - 1)) / Data.PerVGPR; in getPerVGPRData()
141 Data.VGPRLanes = (1LL << std::min(Data.PerVGPR, NumSubRegs)) - 1LL; in getPerVGPRData()
1049 unsigned NumSubRegs = RegWidth / EltSize; in buildSpillLoadStore() local
1050 unsigned Size = NumSubRegs * EltSize; in buildSpillLoadStore()
1135 for (unsigned i = 0, e = NumSubRegs + NumRemSubRegs, RegOffset = 0; i != e; in buildSpillLoadStore()
1137 if (i == NumSubRegs) { in buildSpillLoadStore()
1320 for (unsigned i = 0, e = SB.NumSubRegs; i < e; ++i) { in spillSGPR()
1322 SB.NumSubRegs == 1 in spillSGPR()
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| H A D | SIInstrInfo.cpp | 5153 unsigned NumSubRegs = RegSize / 32; in emitLoadSRsrcFromVGPRLoop() local
5154 assert(NumSubRegs % 2 == 0 && NumSubRegs <= 32 && "Unhandled register size"); in emitLoadSRsrcFromVGPRLoop()
5156 for (unsigned Idx = 0; Idx < NumSubRegs; Idx += 2) { in emitLoadSRsrcFromVGPRLoop()
5184 if (NumSubRegs <= 2) in emitLoadSRsrcFromVGPRLoop()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 329 const MCInstrDesc &MCID, unsigned int NumSubRegs, in copyPhysSubRegs() argument
334 for (unsigned Idx = 0; Idx != NumSubRegs; ++Idx) { in copyPhysSubRegs()
394 unsigned int NumSubRegs = 2; in copyPhysReg() local
396 NumSubRegs, SubRegIdx, &getRegisterInfo()); in copyPhysReg()
400 unsigned int NumSubRegs = 2; in copyPhysReg() local
402 NumSubRegs, SubRegIdx, &getRegisterInfo()); in copyPhysReg()
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