Searched refs:NumSubElts (Results 1 – 7 of 7) sorted by relevance
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | BasicTTIImpl.h | 122 int NumSubElts = SubVTy->getNumElements(); in getExtractSubvectorOverhead() local 124 (Index + NumSubElts) <= in getExtractSubvectorOverhead() 132 for (int i = 0; i != NumSubElts; ++i) { in getExtractSubvectorOverhead() 147 int NumSubElts = SubVTy->getNumElements(); in getInsertSubvectorOverhead() local 149 (Index + NumSubElts) <= in getInsertSubvectorOverhead() 157 for (int i = 0; i != NumSubElts; ++i) { in getInsertSubvectorOverhead() 1143 unsigned NumSubElts = NumElts / Factor; variable 1144 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts); 1187 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt) 1213 for (unsigned i = 0; i < NumSubElts; i++) [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86TargetTransformInfo.cpp | 1037 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost() local 1038 if ((Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0) in getShuffleCost() 1047 if (NumSubElts > OrigSubElts && (Index % OrigSubElts) == 0 && in getShuffleCost() 1048 (NumSubElts % OrigSubElts) == 0 && in getShuffleCost() 1053 assert(NumElts >= NumSubElts && NumElts > OrigSubElts && in getShuffleCost() 1059 int ExtractIndex = alignDown((Index % NumElts), NumSubElts); in getShuffleCost() 1084 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost() local 1085 if ((Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0) in getShuffleCost()
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H A D | X86InstCombineIntrinsic.cpp | 264 for (unsigned i = 0, NumSubElts = 64 / BitWidth; i != NumSubElts; ++i) { in simplifyX86immShift() local 265 unsigned SubEltIdx = (NumSubElts - 1) - i; in simplifyX86immShift()
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H A D | X86ISelLowering.cpp | 6140 unsigned NumSubElts = OpVT.getVectorNumElements() / NumSubs; in SplitOpsAndApply() local 6142 SubOps.push_back(extractSubVector(Op, i * NumSubElts, DAG, DL, SizeSub)); in SplitOpsAndApply() 6716 unsigned NumSubElts = CstSizeInBits / SubEltSizeInBits; in getTargetConstantBitsFromNode() local 6718 APInt UndefSubElts(NumSubElts, 0); in getTargetConstantBitsFromNode() 6719 SmallVector<APInt, 64> SubEltBits(NumSubElts * NumSubVecs, in getTargetConstantBitsFromNode() 6721 for (unsigned i = 0; i != NumSubElts; ++i) { in getTargetConstantBitsFromNode() 6726 SubEltBits[i + (j * NumSubElts)] = SubEltBits[i]; in getTargetConstantBitsFromNode() 6785 unsigned NumSubElts = VT.getVectorNumElements(); in getTargetConstantBitsFromNode() local 6787 UndefElts = UndefElts.extractBits(NumSubElts, BaseIdx); in getTargetConstantBitsFromNode() 6788 if ((BaseIdx + NumSubElts) != NumSrcElts) in getTargetConstantBitsFromNode() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 835 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in SimplifyMultipleUseDemandedBits() local 836 if (DemandedElts.extractBits(NumSubElts, Idx) == 0) in SimplifyMultipleUseDemandedBits() 1047 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in SimplifyDemandedBits() local 1048 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in SimplifyDemandedBits() 1050 DemandedSrcElts.insertBits(APInt::getNullValue(NumSubElts), Idx); in SimplifyDemandedBits() 1114 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedBits() local 1117 DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedBits() 2558 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedVectorElts() local 2561 APInt SubElts = DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedVectorElts() 2566 KnownUndef.insertBits(SubUndef, i * NumSubElts); in SimplifyDemandedVectorElts() [all …]
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H A D | SelectionDAG.cpp | 2880 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in computeKnownBits() local 2881 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in computeKnownBits() 2883 DemandedSrcElts.insertBits(APInt::getNullValue(NumSubElts), Idx); in computeKnownBits() 4129 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in ComputeNumSignBits() local 4130 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in ComputeNumSignBits() 4132 DemandedSrcElts.insertBits(APInt::getNullValue(NumSubElts), Idx); in ComputeNumSignBits() 9834 auto PartialReduction = [&](SDValue Op, unsigned NumSubElts) { in matchBinOpReduction() argument 9839 EVT SubVT = EVT::getVectorVT(*getContext(), OpSVT, NumSubElts); in matchBinOpReduction()
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H A D | DAGCombiner.cpp | 21657 int NumSubElts = NumElts * Split; in XformToShuffleWithZero() local 21661 for (int i = 0; i != NumSubElts; ++i) { in XformToShuffleWithZero() 21668 Indices.push_back(i + NumSubElts); in XformToShuffleWithZero() 21689 Indices.push_back(i + NumSubElts); in XformToShuffleWithZero() 21696 EVT ClearVT = EVT::getVectorVT(*DAG.getContext(), ClearSVT, NumSubElts); in XformToShuffleWithZero()
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