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Searched refs:NumMicroOps (Results 1 – 25 of 61) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64SchedA57WriteRes.td65 let NumMicroOps = 2;
71 let NumMicroOps = 2;
76 let NumMicroOps = 2;
81 let NumMicroOps = 2;
85 let NumMicroOps = 2;
89 let NumMicroOps = 2;
93 let NumMicroOps = 2;
97 let NumMicroOps = 2;
101 let NumMicroOps = 2;
105 let NumMicroOps = 2;
[all …]
H A DAArch64SchedKryoDetails.td16 let Latency = 3; let NumMicroOps = 2;
23 let Latency = 3; let NumMicroOps = 2;
30 let Latency = 4; let NumMicroOps = 3;
36 let Latency = 4; let NumMicroOps = 4;
42 let Latency = 3; let NumMicroOps = 4;
48 let Latency = 3; let NumMicroOps = 2;
54 let Latency = 3; let NumMicroOps = 2;
60 let Latency = 3; let NumMicroOps = 2;
66 let Latency = 3; let NumMicroOps = 2;
72 let Latency = 3; let NumMicroOps = 2;
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H A DAArch64SchedThunderX3T110.td120 let NumMicroOps = 2;
126 let NumMicroOps = 2;
132 let NumMicroOps = 2;
138 let NumMicroOps = 3;
145 let NumMicroOps = 4;
152 let NumMicroOps = 4;
158 let NumMicroOps = 2;
164 let NumMicroOps = 3;
170 let NumMicroOps = 2;
176 let NumMicroOps = 3;
[all …]
H A DAArch64SchedFalkorDetails.td36 let NumMicroOps = 0;
40 let NumMicroOps = 0;
44 let NumMicroOps = 0;
48 let NumMicroOps = 0;
94 let NumMicroOps = 2;
98 let NumMicroOps = 2;
102 let NumMicroOps = 2;
106 let NumMicroOps = 2;
110 let NumMicroOps = 2;
114 let NumMicroOps = 2;
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H A DAArch64SchedExynosM5.td136 let NumMicroOps = 0; }
138 let NumMicroOps = 0; }
149 let NumMicroOps = 2; }
153 let NumMicroOps = 3; }
156 let NumMicroOps = 2; }
158 let NumMicroOps = 2; }
160 let NumMicroOps = 2; }
209 let NumMicroOps = 1; }
212 let NumMicroOps = 2; }
216 let NumMicroOps = 2; }
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H A DAArch64SchedExynosM3.td110 let NumMicroOps = 1; }
112 let NumMicroOps = 0; }
119 let NumMicroOps = 2; }
123 let NumMicroOps = 3; }
126 let NumMicroOps = 2; }
153 let NumMicroOps = 1; }
156 let NumMicroOps = 2; }
160 let NumMicroOps = 2; }
163 let NumMicroOps = 2; }
166 let NumMicroOps = 2; }
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H A DAArch64SchedExynosM4.td136 let NumMicroOps = 0; }
138 let NumMicroOps = 0; }
146 let NumMicroOps = 2; }
150 let NumMicroOps = 3; }
153 let NumMicroOps = 2; }
155 let NumMicroOps = 2; }
190 let NumMicroOps = 1; }
193 let NumMicroOps = 2; }
197 let NumMicroOps = 2; }
200 let NumMicroOps = 2; }
[all …]
H A DAArch64SchedThunderX2T99.td96 let NumMicroOps = 2;
102 let NumMicroOps = 2;
108 let NumMicroOps = 2;
115 let NumMicroOps = 4;
122 let NumMicroOps = 4;
128 let NumMicroOps = 2;
134 let NumMicroOps = 2;
140 let NumMicroOps = 3;
146 let NumMicroOps = 3;
152 let NumMicroOps = 2;
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H A DAArch64SchedKryo.td67 { let Latency = 2; let NumMicroOps = 2; }
69 { let Latency = 2; let NumMicroOps = 2; }
71 { let Latency = 2; let NumMicroOps = 2; }
74 { let Latency = 8; let NumMicroOps = 1; } // Fragent -1
76 { let Latency = 8; let NumMicroOps = 1; } // Fragent -1
88 { let Latency = 3; let NumMicroOps = 2; }
94 { let Latency = 6; let NumMicroOps = 2; }
96 { let Latency = 12; let NumMicroOps = 2; } // Fragent -1 / NoRSV +1
H A DAArch64SchedTSV110.td195 let NumMicroOps = 2;
201 let NumMicroOps = 2;
207 let NumMicroOps = 2;
213 let NumMicroOps = 2;
219 let NumMicroOps = 2;
225 let NumMicroOps = 2;
231 let NumMicroOps = 2;
237 let NumMicroOps = 2;
243 let NumMicroOps = 2;
249 let NumMicroOps = 2;
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMScheduleA57WriteRes.td91 let NumMicroOps = 2;
97 let NumMicroOps = 2;
102 let NumMicroOps = 2;
107 let NumMicroOps = 2;
112 let NumMicroOps = 2;
117 let NumMicroOps = 2;
121 let NumMicroOps = 2;
125 let NumMicroOps = 2;
129 let NumMicroOps = 2;
133 let NumMicroOps = 2;
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86SchedHaswell.td104 let NumMicroOps = UOps;
112 let NumMicroOps = !add(UOps, 1);
172 let NumMicroOps = 3;
468 let NumMicroOps = 2;
473 let NumMicroOps = 2;
479 let NumMicroOps = 2;
483 let NumMicroOps = 3;
491 let NumMicroOps = 3;
496 let NumMicroOps = 4;
503 let NumMicroOps = 9;
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H A DX86SchedSkylakeClient.td98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, 1);
165 let NumMicroOps = 3;
416 let NumMicroOps = 2;
421 let NumMicroOps = 2;
427 let NumMicroOps = 2;
431 let NumMicroOps = 3;
481 let NumMicroOps = 3;
486 let NumMicroOps = 4;
493 let NumMicroOps = 9;
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H A DX86SchedBroadwell.td99 let NumMicroOps = UOps;
107 let NumMicroOps = !add(UOps, 1);
168 let NumMicroOps = 3;
426 let NumMicroOps = 2;
431 let NumMicroOps = 2;
436 let NumMicroOps = 2;
440 let NumMicroOps = 3;
490 let NumMicroOps = 3;
495 let NumMicroOps = 4;
502 let NumMicroOps = 9;
[all …]
H A DX86SchedSkylakeServer.td98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, 1);
166 let NumMicroOps = 3;
417 let NumMicroOps = 2;
422 let NumMicroOps = 2;
428 let NumMicroOps = 2;
432 let NumMicroOps = 3;
482 let NumMicroOps = 3;
487 let NumMicroOps = 4;
494 let NumMicroOps = 9;
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H A DX86SchedSandyBridge.td94 let NumMicroOps = UOps;
102 let NumMicroOps = !add(UOps, 1);
167 let NumMicroOps = 3;
437 let NumMicroOps = 2;
441 let NumMicroOps = 2;
446 let NumMicroOps = 2;
450 let NumMicroOps = 3;
472 let NumMicroOps = 3;
477 let NumMicroOps = 4;
494 let NumMicroOps = 3;
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H A DX86ScheduleZnver3.td405 let NumMicroOps = UOps;
500 let NumMicroOps = 1;
514 let NumMicroOps = 1;
521 let NumMicroOps = 2;
531 let NumMicroOps = 1;
542 let NumMicroOps = 1;
549 let NumMicroOps = 1;
556 let NumMicroOps = 1;
566 let NumMicroOps = 1;
577 let NumMicroOps = 2;
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H A DX86ScheduleBdVer2.td196 let NumMicroOps = UOps;
276 def : WriteRes<WriteSTMXCSR, [PdStore]> { let NumMicroOps = 2; let ResourceCycles = [18]; }
311 let NumMicroOps = 45;
329 let NumMicroOps = 1;
336 let NumMicroOps = 4;
343 let NumMicroOps = 2;
355 let NumMicroOps = 2;
380 let NumMicroOps = 3;
387 let NumMicroOps = 5;
394 let NumMicroOps = 6;
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H A DX86ScheduleZnver2.td139 let NumMicroOps = UOps;
147 let NumMicroOps = !add(UOps, LoadUOps);
160 let NumMicroOps = UOps;
168 let NumMicroOps = !add(UOps, LoadUOps);
444 let NumMicroOps = 2;
454 let NumMicroOps = 2;
527 let NumMicroOps = 2;
535 let NumMicroOps = 2;
545 let NumMicroOps = 2;
641 let NumMicroOps = 2;
[all …]
H A DX86ScheduleZnver1.td140 let NumMicroOps = UOps;
148 let NumMicroOps = !add(UOps, LoadUOps);
161 let NumMicroOps = UOps;
169 let NumMicroOps = !add(UOps, LoadUOps);
462 let NumMicroOps = 2;
472 let NumMicroOps = 2;
540 let NumMicroOps = 2;
550 let NumMicroOps = 2;
643 let NumMicroOps = 2;
654 let NumMicroOps = 2;
[all …]
H A DX86ScheduleBtVer2.td129 let NumMicroOps = UOps;
137 let NumMicroOps = !add(UOps, LoadUOps);
149 let NumMicroOps = UOps;
157 let NumMicroOps = !add(UOps, LoadUOps);
169 let NumMicroOps = UOps;
177 let NumMicroOps = !add(UOps, LoadUOps);
313 let NumMicroOps = 3;
319 let NumMicroOps = 5;
325 let NumMicroOps = 6;
331 let NumMicroOps = 5;
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
H A DDispatchStage.cpp63 const unsigned NumMicroOps = IR.getInstruction()->getNumMicroOps(); in checkRCU() local
64 if (RCU.isAvailable(NumMicroOps)) in checkRCU()
82 const unsigned NumMicroOps = IS.getNumMicroOps(); in dispatch() local
83 if (NumMicroOps > DispatchWidth) { in dispatch()
86 CarryOver = NumMicroOps - DispatchWidth; in dispatch()
89 assert(AvailableEntries >= NumMicroOps); in dispatch()
90 AvailableEntries -= NumMicroOps; in dispatch()
131 std::min(DispatchWidth, NumMicroOps)); in dispatch()
161 unsigned NumMicroOps = Inst.getNumMicroOps(); in isAvailable() local
163 unsigned Required = std::min(NumMicroOps, DispatchWidth); in isAvailable()
H A DInOrderIssueStage.cpp40 unsigned NumMicroOps = Inst.getNumMicroOps(); in isAvailable() local
43 bool ShouldCarryOver = NumMicroOps > SM.IssueWidth; in isAvailable()
44 if (Bandwidth < NumMicroOps && !ShouldCarryOver) in isAvailable()
240 unsigned NumMicroOps = IS.getNumMicroOps(); in tryIssue() local
241 notifyInstructionDispatch(IR, NumMicroOps, UsedRegs, *this); in tryIssue()
254 bool ShouldCarryOver = NumMicroOps > Bandwidth; in tryIssue()
256 CarryOver = NumMicroOps - Bandwidth; in tryIssue()
262 NumIssued += NumMicroOps; in tryIssue()
263 Bandwidth = Desc.EndGroup ? 0 : Bandwidth - NumMicroOps; in tryIssue()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/
H A DSummaryView.cpp29 TotalCycles(0), NumMicroOps(0), in SummaryView()
56 NumMicroOps += Desc.NumMicroOps; in onEvent()
93 DV.TotalUOps = NumMicroOps * DV.Iterations; in collectData()
96 DV.BlockRThroughput = computeBlockRThroughput(SM, DispatchWidth, NumMicroOps, in collectData()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZHazardRecognizer.cpp51 assert((SC->NumMicroOps != 2 || (SC->BeginGroup && !SC->EndGroup)) && in getNumDecoderSlots()
53 assert((SC->NumMicroOps < 3 || (SC->BeginGroup && SC->EndGroup)) && in getNumDecoderSlots()
55 assert((SC->NumMicroOps < 3 || (SC->NumMicroOps % 3 == 0)) && in getNumDecoderSlots()
58 return SC->NumMicroOps; in getNumDecoderSlots()
194 if (SC->NumMicroOps > 1) in dumpSU()
195 OS << "/" << SC->NumMicroOps << "uops"; in dumpSU()

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