| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineSSAUpdater.cpp | 124 Register NewVR = MRI->createVirtualRegister(RC); in InsertNewDef() local
125 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); in InsertNewDef()
226 Register NewVR; in RewriteUse() local
229 NewVR = GetValueAtEndOfBlockInternal(SourceBB); in RewriteUse()
231 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
234 U.setReg(NewVR); in RewriteUse()
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| H A D | PeepholeOptimizer.cpp | 588 Register NewVR = MRI->createVirtualRegister(RC); in INITIALIZE_PASS_DEPENDENCY() local
590 TII->get(TargetOpcode::COPY), NewVR) in INITIALIZE_PASS_DEPENDENCY()
597 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
770 Register NewVR = MRI.createVirtualRegister(NewRC); in insertPHI() local
773 TII.get(TargetOpcode::PHI), NewVR); in insertPHI()
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| H A D | TargetInstrInfo.cpp | 864 Register NewVR = MRI.createVirtualRegister(RC); in reassociateOps() local
865 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in reassociateOps()
874 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR) in reassociateOps()
880 .addReg(NewVR, getKillRegState(true)); in reassociateOps()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 5083 Register NewVR = MRI.createVirtualRegister(RC); in genNeg() local
5085 BuildMI(MF, Root.getDebugLoc(), TII->get(MnegOpc), NewVR) in genNeg()
5090 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genNeg()
5092 return NewVR; in genNeg()
5104 Register NewVR = in genFusedMultiplyAccNeg() local
5107 FMAInstKind::Accumulator, &NewVR); in genFusedMultiplyAccNeg()
5131 Register NewVR = in genFusedMultiplyIdxNeg() local
5135 FMAInstKind::Indexed, &NewVR); in genFusedMultiplyIdxNeg()
5266 Register NewVR = MRI.createVirtualRegister(OrrRC); in genAlternativeCodeSequence() local
5277 BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) in genAlternativeCodeSequence()
[all …]
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| H A D | AArch64ISelLowering.cpp | 17133 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
17143 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
17150 .addReg(NewVR); in insertCopiesSplitCSR()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 1403 Register NewVR = MRI->createVirtualRegister(RC); in generateInserts() local
1404 RegMap[VR] = NewVR; in generateInserts()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2241 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
2244 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
2251 .addReg(NewVR); in insertCopiesSplitCSR()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 20056 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
20066 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
20073 .addReg(NewVR); in insertCopiesSplitCSR()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 52144 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
52154 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
52161 .addReg(NewVR); in insertCopiesSplitCSR()
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