Searched refs:MaxVGPRs (Results 1 – 6 of 6) sorted by relevance
74 unsigned MaxVGPRs; member in __anonda3a1cae0111::AMDGPUPromoteAllocaImpl178 MaxVGPRs = ST.getMaxNumVGPRs(ST.getWavesPerEU(F).first); in run()180 MaxVGPRs = 128; in run()408 unsigned MaxVGPRs) { in tryPromoteAllocaToVector() argument425 : (MaxVGPRs * 32); in tryPromoteAllocaToVector()429 << MaxVGPRs << " registers available\n"); in tryPromoteAllocaToVector()860 if (tryPromoteAllocaToVector(&I, DL, MaxVGPRs)) in handleAlloca()1080 bool handlePromoteAllocaToVector(AllocaInst &I, unsigned MaxVGPRs) { in handlePromoteAllocaToVector() argument1089 return tryPromoteAllocaToVector(&I, Mod->getDataLayout(), MaxVGPRs); in handlePromoteAllocaToVector()1100 unsigned MaxVGPRs; in promoteAllocasToVector() local[all …]
76 unsigned MaxVGPRs; member in __anonb471f8770111::SIFormMemoryClauses209 MaxPressure.getVGPRNum(ST->hasGFX90AInsts()) <= MaxVGPRs / 2 && in checkPressure()275 MaxVGPRs = TRI->getAllocatableSet(MF, &AMDGPU::VGPR_32RegClass).count(); in runOnMachineFunction()
388 unsigned MaxVGPRs = ST.getMaxNumVGPRs(MF); in schedule() local390 if (PressureAfter.getVGPRNum(false) > MaxVGPRs || in schedule()391 PressureAfter.getAGPRNum() > MaxVGPRs || in schedule()
74 unsigned MaxVGPRs; variable
289 MaxVGPRs(ST->getMaxNumVGPRs( in GCNTTIImpl()301 return MaxVGPRs; in getHardwareNumberOfRegisters()
555 unsigned MaxVGPRs = RI.getRegPressureLimit(&AMDGPU::VGPR_32RegClass, in indirectCopyToAGPR() local572 if (!Tmp2 || RI.getHWRegIndex(Tmp2) >= MaxVGPRs) in indirectCopyToAGPR()