| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/PBQP/ |
| H A D | Math.h | 121 class Matrix {
123 friend hash_code hash_value(const Matrix &);
127 Matrix(unsigned Rows, unsigned Cols) : in Matrix() function
133 Matrix(unsigned Rows, unsigned Cols, PBQPNum InitVal) in Matrix() function
140 Matrix(const Matrix &M) in Matrix() function
147 Matrix(Matrix &&M) in Matrix() function
153 bool operator==(const Matrix &M) const {
205 Matrix transpose() const { in transpose()
207 Matrix M(Cols, Rows); in transpose()
215 Matrix& operator+=(const Matrix &M) {
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| H A D | ReductionRules.h | 34 using Matrix = typename GraphT::Matrix; in applyR1() local
43 const Matrix &ECosts = G.getEdgeCosts(EId); in applyR1()
78 using Matrix = typename GraphT::Matrix; in applyR2() local
96 const Matrix *YXECosts = FlipEdge1 ? in applyR2()
97 new Matrix(G.getEdgeCosts(YXEId).transpose()) : in applyR2()
100 const Matrix *ZXECosts = FlipEdge2 ? in applyR2()
101 new Matrix(G.getEdgeCosts(ZXEId).transpose()) : in applyR2()
134 const Matrix &YZECosts = G.getEdgeCosts(YZEId); in applyR2()
182 using Matrix = typename GraphT::Matrix; in backpropagate() local
203 const Matrix& edgeCosts = G.getEdgeCosts(EId); in backpropagate()
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| H A D | Graph.h | 54 using Matrix = typename SolverT::Matrix; variable
530 const Matrix& getEdgeCosts(EdgeId EId) const { in getEdgeCosts()
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| H A D | CostAllocator.h | 114 using Matrix = MatrixT; variable
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 323 ArrayRef<Instruction *> Matrix, in interleave8bitStride4VF8() argument
349 Builder.CreateShuffleVector(Matrix[0], Matrix[1], MaskLow); in interleave8bitStride4VF8()
351 Builder.CreateShuffleVector(Matrix[2], Matrix[3], MaskLow); in interleave8bitStride4VF8()
363 ArrayRef<Instruction *> Matrix, SmallVectorImpl<Value *> &TransposedMatrix, in interleave8bitStride4() argument
401 IntrVec[0] = Builder.CreateShuffleVector(Matrix[0], Matrix[1], MaskLow); in interleave8bitStride4()
402 IntrVec[1] = Builder.CreateShuffleVector(Matrix[0], Matrix[1], MaskHigh); in interleave8bitStride4()
403 IntrVec[2] = Builder.CreateShuffleVector(Matrix[2], Matrix[3], MaskLow); in interleave8bitStride4()
404 IntrVec[3] = Builder.CreateShuffleVector(Matrix[2], Matrix[3], MaskHigh); in interleave8bitStride4()
689 ArrayRef<Instruction *> Matrix, in transpose_4x4() argument
691 assert(Matrix.size() == 4 && "Invalid matrix size"); in transpose_4x4()
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| H A D | X86RegisterInfo.h | 151 const LiveRegMatrix *Matrix) const override;
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| H A D | X86RegisterInfo.cpp | 914 const LiveRegMatrix *Matrix) const { in getRegAllocationHints()
918 VirtReg, Order, Hints, MF, VRM, Matrix); in getRegAllocationHints()
925 Register VReg = Matrix->getOneVReg(PhysReg); in getRegAllocationHints()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | LiveRegMatrix.cpp | 61 if (NumRegUnits != Matrix.size()) in runOnMachineFunction()
63 Matrix.init(LIUAlloc, NumRegUnits); in runOnMachineFunction()
71 for (unsigned i = 0, e = Matrix.size(); i != e; ++i) { in releaseMemory()
72 Matrix[i].clear(); in releaseMemory()
113 Matrix[Unit].unify(VirtReg, Range); in assign()
130 Matrix[Unit].extract(VirtReg, Range); in unassign()
140 if (!Matrix[*Unit].empty()) in isPhysRegUsed()
181 Q.init(UserTag, LR, Matrix[RegUnit]); in query()
232 Q.reset(UserTag, LR, Matrix[*Units]); in checkInterference()
242 if ((VRegInterval = Matrix[*Unit].getOneVReg())) in getOneVReg()
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| H A D | RegAllocBasic.cpp | 152 Matrix->unassign(LI); in INITIALIZE_PASS_DEPENDENCY()
170 Matrix->unassign(LI); in LRE_WillShrinkVirtReg()
217 LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units); in spillInterferences()
240 Matrix->unassign(Spill); in spillInterferences()
268 AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix); in selectOrSplit()
272 switch (Matrix->checkInterference(VirtReg, PhysReg)) { in selectOrSplit()
293 assert(!Matrix->checkInterference(VirtReg, PhysReg) && in selectOrSplit()
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| H A D | RegAllocGreedy.cpp | 677 Matrix->unassign(LI); in LRE_CanEraseVirtReg()
695 Matrix->unassign(LI); in LRE_WillShrinkVirtReg()
806 if (!Matrix->checkInterference(VirtReg, *I)) { in tryAssign()
855 AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix); in canReassign()
864 LiveIntervalUnion::Query subQ(VirtReg, Matrix->getLiveUnions()[*Units]); in canReassign()
921 if (Matrix->checkInterference(VirtReg, PhysReg) > LiveRegMatrix::IK_VirtReg) in canEvictInterference()
939 LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units); in canEvictInterference()
1022 LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units); in canEvictInterferenceInRange()
1108 LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units); in evictInterference()
1126 Matrix->unassign(*Intf); in evictInterference()
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| H A D | RegAllocBase.cpp | 63 Matrix = &mat; in init()
100 Matrix->invalidateVirtRegs(); in allocatePhysRegs()
147 Matrix->assign(*VirtReg, AvailablePhysReg); in allocatePhysRegs()
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| H A D | AllocationOrder.cpp | 31 const LiveRegMatrix *Matrix) { in create() argument
37 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix); in create()
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| H A D | RegAllocBase.h | 68 LiveRegMatrix *Matrix = nullptr; variable
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| H A D | AllocationOrder.h | 86 const LiveRegMatrix *Matrix);
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| H A D | MatrixBuilder.h | 93 CallInst *CreateColumnMajorStore(Value *Matrix, Value *Ptr, Align Alignment,
97 Value *Ops[] = {Matrix, Ptr,
100 Type *OverloadedTypes[] = {Matrix->getType()};
114 CallInst *CreateMatrixTranspose(Value *Matrix, unsigned Rows,
116 auto *OpType = cast<VectorType>(Matrix->getType());
121 Value *Ops[] = {Matrix, B.getInt32(Rows), B.getInt32(Columns)};
150 Value *CreateMatrixInsert(Value *Matrix, Value *NewVal, Value *RowIdx, in CreateMatrixInsert() argument
153 Matrix, NewVal, in CreateMatrixInsert()
235 Value *CreateExtractElement(Value *Matrix, Value *RowIdx, Value *ColumnIdx,
245 Matrix, B.CreateAdd(B.CreateMul(ColumnIdx, NumRowsV), RowIdx),
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIPreAllocateWWMRegs.cpp | 36 LiveRegMatrix *Matrix; member in __anon62c696f20111::SIPreAllocateWWMRegs
105 Matrix->checkInterference(LI, PhysReg) == LiveRegMatrix::IK_Free) { in processDef()
106 Matrix->assign(LI, PhysReg); in processDef()
208 Matrix = &getAnalysis<LiveRegMatrix>(); in runOnMachineFunction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | LiveRegMatrix.h | 50 LiveIntervalUnion::Array Matrix; variable
155 LiveIntervalUnion *getLiveUnions() { return &Matrix[0]; } in getLiveUnions()
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| H A D | RegAllocPBQP.h | 55 MatrixMetadata(const Matrix& M) in MatrixMetadata()
275 using RawMatrix = PBQP::Matrix;
277 using Matrix = RAMatrix; variable
278 using CostAllocator = PBQP::PoolCostAllocator<Vector, Matrix>;
327 void handleUpdateCosts(EdgeId EId, const Matrix& NewCosts) { in handleUpdateCosts()
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| /netbsd-src/external/apache2/llvm/dist/clang/docs/ |
| H A D | MatrixTypes.rst | 2 Matrix Types
20 Matrix Type
24 number of *rows*, and a constant number of *columns*. Matrix types with the same
42 Matrix Type Attribute
45 Matrix types can be declared by adding the ``matrix_type`` attribute to the
91 Matrix Type Element Access Operator
118 Matrix Type Binary Operators
192 Matrix Type Builtin Operations
203 * *M*, *M1*, *M2*, *M3* - Matrix types
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| H A D | armada-xp-matrix.dts | 3 * Device Tree file for Marvell Armada XP Matrix board
14 model = "Marvell Armada XP Matrix Board";
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| /netbsd-src/sys/arch/evbarm/conf/ |
| H A D | TS7200_LCD | 14 # 4x4 Matrix Keypad on DIO header
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.h | 139 const LiveRegMatrix *Matrix) const override;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | LowerMatrixIntrinsics.cpp | 915 void LowerStore(Instruction *Inst, Value *Matrix, Value *Ptr, MaybeAlign A, in LowerStore() argument
918 auto StoreVal = getMatrix(Matrix, Shape, Builder); in LowerStore()
920 storeMatrix(Matrix->getType(), StoreVal, Ptr, A, Stride, in LowerStore()
931 Value *Matrix = Inst->getArgOperand(0); in LowerColumnMajorStore() local
934 LowerStore(Inst, Matrix, Ptr, Inst->getParamAlign(1), Stride, in LowerColumnMajorStore()
1000 void finalizeLowering(Instruction *Inst, MatrixTy Matrix, in finalizeLowering() argument
1002 Inst2ColumnMatrix.insert(std::make_pair(Inst, Matrix)); in finalizeLowering()
1009 Flattened = Matrix.embedInVector(Builder); in finalizeLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCV.td | 97 "'Zbm' (Matrix 'B' Instructions)">;
100 "'Zbm' (Matrix 'B' Instructions)">;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 160 const LiveRegMatrix *Matrix) const override;
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