Searched refs:MaskHi (Results 1 – 4 of 4) sorted by relevance
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorTypes.cpp | 1745 SDValue MaskLo, MaskHi; in SplitVecRes_MLOAD() local 1747 SplitVecRes_SETCC(Mask.getNode(), MaskLo, MaskHi); in SplitVecRes_MLOAD() 1750 GetSplitVector(Mask, MaskLo, MaskHi); in SplitVecRes_MLOAD() 1752 std::tie(MaskLo, MaskHi) = DAG.SplitVector(Mask, dl); in SplitVecRes_MLOAD() 1797 Hi = DAG.getMaskedLoad(HiVT, dl, Ch, Ptr, Offset, MaskHi, PassThruHi, in SplitVecRes_MLOAD() 1830 SDValue MaskLo, MaskHi; in SplitVecRes_MGATHER() local 1832 SplitVecRes_SETCC(Mask.getNode(), MaskLo, MaskHi); in SplitVecRes_MGATHER() 1835 GetSplitVector(Mask, MaskLo, MaskHi); in SplitVecRes_MGATHER() 1837 std::tie(MaskLo, MaskHi) = DAG.SplitVector(Mask, dl); in SplitVecRes_MGATHER() 1865 SDValue OpsHi[] = {Ch, PassThruHi, MaskHi, Ptr, IndexHi, Scale}; in SplitVecRes_MGATHER() [all …]
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H A D | TargetLowering.cpp | 1862 APInt MaskHi = DemandedBits.getHiBits(HalfBitWidth).trunc(HalfBitWidth); in SimplifyDemandedBits() local 1869 if (SimplifyDemandedBits(Op.getOperand(1), MaskHi, KnownHi, TLO, Depth + 1)) in SimplifyDemandedBits()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.cpp | 2564 Register MaskHi = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK() local 2567 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), MaskHi) in selectG_PTRMASK() 2571 .addReg(MaskHi); in selectG_PTRMASK()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 23222 static const int MaskHi[] = { 1, 1, 3, 3 }; in LowerVSETCC() local 23223 SDValue Result = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskHi); in LowerVSETCC() 23233 static const int MaskHi[] = { 1, 1, 3, 3 }; in LowerVSETCC() local 23234 SDValue Result = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskHi); in LowerVSETCC() 23260 static const int MaskHi[] = { 1, 1, 3, 3 }; in LowerVSETCC() local 23262 SDValue EQHi = DAG.getVectorShuffle(MVT::v4i32, dl, EQ, EQ, MaskHi); in LowerVSETCC() 23264 SDValue GTHi = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskHi); in LowerVSETCC()
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