| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.h | 42 MachineRegisterInfo &MRI,
45 bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
47 bool legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI,
49 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
51 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
53 bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
55 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
57 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
60 bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
62 bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
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| H A D | AMDGPURegisterBankInfo.h | 53 MachineRegisterInfo &MRI,
60 MachineRegisterInfo &MRI) const;
64 MachineRegisterInfo &MRI,
67 MachineRegisterInfo &MRI,
70 void constrainOpWithReadfirstlane(MachineInstr &MI, MachineRegisterInfo &MRI,
74 MachineRegisterInfo &MRI) const;
77 MachineRegisterInfo &MRI) const;
81 MachineRegisterInfo &MRI, int RSrcIdx) const;
87 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
99 const ValueMapping *getValueMappingForPtr(const MachineRegisterInfo &MRI,
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| H A D | SIRegisterInfo.h | 163 bool isSGPRReg(const MachineRegisterInfo &MRI, Register Reg) const;
222 MCRegister findUnusedRegister(const MachineRegisterInfo &MRI,
227 const TargetRegisterClass *getRegClassForReg(const MachineRegisterInfo &MRI,
229 bool isVGPR(const MachineRegisterInfo &MRI, Register Reg) const;
230 bool isAGPR(const MachineRegisterInfo &MRI, Register Reg) const;
231 bool isVectorRegister(const MachineRegisterInfo &MRI, Register Reg) const { in isVectorRegister()
265 const MachineRegisterInfo &MRI) const;
270 const MachineRegisterInfo &MRI) const { in getRegClassForTypeOnBank()
276 const MachineRegisterInfo &MRI) const override;
299 MachineRegisterInfo &MRI,
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| H A D | GCNRegPressure.h | 26 class MachineRegisterInfo; variable
71 const MachineRegisterInfo &MRI);
94 static unsigned getRegKind(Register Reg, const MachineRegisterInfo &MRI);
116 mutable const MachineRegisterInfo *MRI = nullptr;
142 const MachineRegisterInfo &MRI);
199 const MachineRegisterInfo &MRI);
203 const MachineRegisterInfo &MRI);
262 GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI, in getRegPressure()
275 const MachineRegisterInfo &MRI);
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| H A D | SIInstrInfo.h | 33 class MachineRegisterInfo; variable
63 MachineRegisterInfo &MRI,
69 MachineRegisterInfo &MRI,
117 MachineRegisterInfo &MRI,
120 void addUsersToMoveToVALUWorklist(Register Reg, MachineRegisterInfo &MRI,
327 MachineRegisterInfo *MRI) const final;
732 const MachineRegisterInfo &MRI = MF.getRegInfo(); in isVGPRCopy()
738 const MachineRegisterInfo &MRI = MF.getRegInfo(); in hasVGPRUses()
752 bool mayReadEXEC(const MachineRegisterInfo &MRI, const MachineInstr &MI) const;
835 bool usesConstantBus(const MachineRegisterInfo &MRI,
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| H A D | AMDGPUInstructionSelector.h | 45 class MachineRegisterInfo; variable
54 MachineRegisterInfo *MRI;
81 bool isVCC(Register Reg, const MachineRegisterInfo &MRI) const;
84 Register Reg, const MachineRegisterInfo &MRI,
135 void getAddrModeInfo(const MachineInstr &Load, const MachineRegisterInfo &MRI,
180 selectVOP3PModsImpl(Register Src, const MachineRegisterInfo &MRI) const;
238 const MachineRegisterInfo &MRI) const;
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 35 class MachineRegisterInfo; variable
85 Register constrainRegToClass(MachineRegisterInfo &MRI,
100 MachineRegisterInfo &MRI,
119 MachineRegisterInfo &MRI,
141 bool canReplaceReg(Register DstReg, Register SrcReg, MachineRegisterInfo &MRI);
145 bool isTriviallyDead(const MachineInstr &MI, const MachineRegisterInfo &MRI);
166 const MachineRegisterInfo &MRI);
171 const MachineRegisterInfo &MRI);
189 getConstantVRegValWithLookThrough(Register VReg, const MachineRegisterInfo &MRI,
194 const MachineRegisterInfo &MRI);
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| H A D | MIPatternMatch.h | 24 bool mi_match(Reg R, const MachineRegisterInfo &MRI, Pattern &&P) { in mi_match()
29 bool mi_match(MachineInstr &MI, const MachineRegisterInfo &MRI, Pattern &&P) { in mi_match()
38 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
52 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
65 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
79 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
96 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
121 bool match(const MachineRegisterInfo &MRI, Register Reg) { return true; } in match()
122 bool match(const MachineRegisterInfo &MRI, MachineOperand *MO) { in match()
132 bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { in match()
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| H A D | RegisterBankInfo.h | 31 class MachineRegisterInfo; variable
290 MachineRegisterInfo &MRI;
324 MachineRegisterInfo &MRI);
335 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI()
548 const MachineRegisterInfo &MRI) const;
585 const RegisterBank *getRegBank(Register Reg, const MachineRegisterInfo &MRI,
647 MachineRegisterInfo &MRI);
731 unsigned getSizeInBits(Register Reg, const MachineRegisterInfo &MRI,
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| H A D | CallLowering.h | 40 class MachineRegisterInfo; variable
218 MachineRegisterInfo &MRI;
222 MachineRegisterInfo &MRI) in ValueHandler()
302 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in IncomingValueHandler()
317 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in OutgoingValueHandler()
401 bool parametersInCSRMatch(const MachineRegisterInfo &MRI,
449 Register &DemoteReg, MachineRegisterInfo &MRI,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 42 void MachineRegisterInfo::Delegate::anchor() {} in anchor()
44 MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) in MachineRegisterInfo() function in MachineRegisterInfo
58 MachineRegisterInfo::setRegClass(Register Reg, const TargetRegisterClass *RC) { in setRegClass()
63 void MachineRegisterInfo::setRegBank(Register Reg, in setRegBank()
69 constrainRegClass(MachineRegisterInfo &MRI, Register Reg, in constrainRegClass()
85 MachineRegisterInfo::constrainRegClass(Register Reg, in constrainRegClass()
92 MachineRegisterInfo::constrainRegAttrs(Register Reg, in constrainRegAttrs()
122 MachineRegisterInfo::recomputeRegClass(Register Reg) { in recomputeRegClass()
146 Register MachineRegisterInfo::createIncompleteVirtualRegister(StringRef Name) { in createIncompleteVirtualRegister()
158 MachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass, in createVirtualRegister()
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| H A D | MIRVRegNamerUtils.h | 29 class MachineRegisterInfo; variable
48 MachineRegisterInfo &MRI;
85 VRegRenamer(MachineRegisterInfo &MRI) : MRI(MRI) {} in VRegRenamer()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.h | 38 bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
40 bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
43 bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
47 bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
51 bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,
53 bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,
55 bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,
57 bool legalizeAtomicCmpxchg128(MachineInstr &MI, MachineRegisterInfo &MRI,
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| H A D | AArch64PostLegalizerLowering.cpp | 218 static bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV()
247 static bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN()
268 static bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP()
284 static bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip()
302 MachineRegisterInfo &MRI, in matchDupFromInsertVectorElt()
341 MachineRegisterInfo &MRI, in matchDupFromBuildVector()
356 static bool matchDup(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDup()
373 static bool matchEXT(MachineInstr &MI, MachineRegisterInfo &MRI, in matchEXT()
429 static bool matchINS(MachineInstr &MI, MachineRegisterInfo &MRI, in matchINS()
456 static bool applyINS(MachineInstr &MI, MachineRegisterInfo &MRI, in applyINS()
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| H A D | AArch64InstructionSelector.cpp | 104 bool earlySelectSHL(MachineInstr &I, MachineRegisterInfo &MRI);
108 MachineRegisterInfo &MRI);
110 bool convertPtrAddToAdd(MachineInstr &I, MachineRegisterInfo &MRI);
113 MachineRegisterInfo &MRI) const;
115 MachineRegisterInfo &MRI) const;
131 MachineRegisterInfo &MRI);
133 bool selectVectorAshrLshr(MachineInstr &I, MachineRegisterInfo &MRI);
134 bool selectVectorSHL(MachineInstr &I, MachineRegisterInfo &MRI);
161 MachineRegisterInfo &MRI);
163 bool selectInsertElt(MachineInstr &I, MachineRegisterInfo &MRI);
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| H A D | AArch64GlobalISelUtils.h | 36 const MachineRegisterInfo &MRI);
41 const MachineRegisterInfo &MRI);
46 const MachineRegisterInfo &MRI);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.h | 28 class MachineRegisterInfo; variable
135 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
138 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
141 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
144 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
147 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
150 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
153 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
156 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
159 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
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| H A D | RDFDeadCode.h | 31 class MachineRegisterInfo; variable
35 DeadCodeElimination(DataFlowGraph &dfg, MachineRegisterInfo &mri) in DeadCodeElimination()
53 MachineRegisterInfo &MRI;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXCopy.cpp | 52 MachineRegisterInfo &MRI) { in IsRegInClass()
62 bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSReg()
66 bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVRReg()
70 bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) { in IsF8Reg()
74 bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSFReg()
78 bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSSReg()
86 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in processBlock()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 77 bool selectLoadStoreOp(MachineInstr &I, MachineRegisterInfo &MRI,
79 bool selectFrameIndexOrGep(MachineInstr &I, MachineRegisterInfo &MRI,
81 bool selectGlobalValue(MachineInstr &I, MachineRegisterInfo &MRI,
83 bool selectConstant(MachineInstr &I, MachineRegisterInfo &MRI,
85 bool selectTruncOrPtrToInt(MachineInstr &I, MachineRegisterInfo &MRI,
87 bool selectZext(MachineInstr &I, MachineRegisterInfo &MRI,
89 bool selectAnyext(MachineInstr &I, MachineRegisterInfo &MRI,
91 bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI,
93 bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
95 bool selectUadde(MachineInstr &I, MachineRegisterInfo &MRI,
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| H A D | X86DomainReassignment.cpp | 103 MachineRegisterInfo *MRI) const = 0;
107 MachineRegisterInfo *MRI) const = 0;
118 MachineRegisterInfo *MRI) const override { in convertInstr()
124 MachineRegisterInfo *MRI) const override { in getExtraCost()
152 MachineRegisterInfo *MRI) const override { in convertInstr()
164 MachineRegisterInfo *MRI) const override { in getExtraCost()
180 MachineRegisterInfo *MRI) const override { in convertInstr()
200 MachineRegisterInfo *MRI) const override { in getExtraCost()
235 MachineRegisterInfo *MRI) const override { in getExtraCost()
266 MachineRegisterInfo *MRI) const override { in convertInstr()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 38 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
50 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
95 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
142 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands()
181 MachineRegisterInfo &MRI) { in canReplaceReg()
195 const MachineRegisterInfo &MRI) { in isTriviallyDead()
271 const MachineRegisterInfo &MRI) { in getConstantVRegVal()
282 const MachineRegisterInfo &MRI) { in getConstantVRegSExtVal()
290 Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs, in getConstantVRegValWithLookThrough()
369 const MachineRegisterInfo &MRI) { in getConstantIntVRegVal()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 59 void processCandidate(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
62 void processDstReg(MachineRegisterInfo *MRI, Register &DstReg,
65 void processInst(MachineRegisterInfo *MRI, MachineInstr *Inst,
67 void checkADDrr(MachineRegisterInfo *MRI, MachineOperand *RelocOp,
69 void checkShift(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
91 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
145 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
159 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
194 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
231 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 66 MachineRegisterInfo *MRI;
105 const MachineRegisterInfo *MRI) { in isGPR64()
114 const MachineRegisterInfo *MRI) { in isFPR64()
128 const MachineRegisterInfo *MRI, in getSrcFromCopy()
209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
241 for (MachineRegisterInfo::use_instr_nodbg_iterator in isProfitableToTransform()
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
321 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 36 class MachineRegisterInfo; variable
161 const MachineRegisterInfo *MRI);
181 const MachineRegisterInfo &MRI, bool TrackLaneMasks,
193 const MachineRegisterInfo &MRI, SlotIndex Pos,
222 const MachineRegisterInfo &MRI);
293 void init(const MachineRegisterInfo &MRI);
362 const MachineRegisterInfo *MRI;
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