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Searched refs:MVP_FIFO_CONTROL__MVP_PAUSE_SLAVE_WM_MASK (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7953 #define MVP_FIFO_CONTROL__MVP_PAUSE_SLAVE_WM_MASK 0x0000ff00L macro
H A Ddce_8_0_sh_mask.h10295 #define MVP_FIFO_CONTROL__MVP_PAUSE_SLAVE_WM_MASK 0xff00 macro
H A Ddce_10_0_sh_mask.h9993 #define MVP_FIFO_CONTROL__MVP_PAUSE_SLAVE_WM_MASK 0xff00 macro
H A Ddce_11_0_sh_mask.h9687 #define MVP_FIFO_CONTROL__MVP_PAUSE_SLAVE_WM_MASK 0xff00 macro
H A Ddce_11_2_sh_mask.h10965 #define MVP_FIFO_CONTROL__MVP_PAUSE_SLAVE_WM_MASK 0xff00 macro