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Searched refs:MI_BATCH_BUFFER_END (Results 1 – 17 of 17) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/selftests/
H A Digt_spinner.c173 *batch++ = MI_BATCH_BUFFER_END; /* not reached */ in igt_spinner_create_request()
211 *spin->batch = MI_BATCH_BUFFER_END; in igt_spinner_end()
H A Di915_request.c621 *cmd = MI_BATCH_BUFFER_END; in empty_batch()
794 *cmd++ = MI_BATCH_BUFFER_END; /* terminate early in case of error */ in recursive_batch()
816 *cmd = MI_BATCH_BUFFER_END; in recursive_batch_resolve()
1060 *cmd = MI_BATCH_BUFFER_END; in live_sequential_engines()
H A Di915_gem_gtt.c1775 *spinner(batch, i) = MI_BATCH_BUFFER_END; in end_spin()
1829 memset32(batch, MI_BATCH_BUFFER_END, PAGE_SIZE / sizeof(u32)); in igt_cs_tlb()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gem/
H A Di915_gem_object_blt.c85 *cmd = MI_BATCH_BUFFER_END; in intel_emit_vma_fill_blt()
284 *cmd = MI_BATCH_BUFFER_END; in intel_emit_vma_copy_blt()
H A Di915_gem_execbuffer.c930 cache->rq_cmd[cache->rq_size] = MI_BATCH_BUFFER_END; in reloc_gpu_flush()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gem/selftests/
H A Digt_gem_utils.c90 *cmd = MI_BATCH_BUFFER_END; in igt_emit_store_dw()
H A Di915_gem_context.c918 *cmd = MI_BATCH_BUFFER_END; in rpcs_query_batch()
1519 *cmd = MI_BATCH_BUFFER_END; in write_to_scratch()
1620 *cmd = MI_BATCH_BUFFER_END; in read_from_scratch()
H A Di915_gem_mman.c995 bbe = MI_BATCH_BUFFER_END; in __igt_mmap_gpu()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/
H A Dintel_renderstate.c151 OUT_BATCH(d, i, MI_BATCH_BUFFER_END); in render_state_setup()
H A Dintel_gpu_commands.h59 #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0) macro
H A Dselftest_hangcheck.c259 *batch++ = MI_BATCH_BUFFER_END; /* not reached */ in hang_create_request()
294 *h->batch = MI_BATCH_BUFFER_END; in hang_fini()
368 *h.batch = MI_BATCH_BUFFER_END; in igt_hang_sanitycheck()
1478 *h.batch = MI_BATCH_BUFFER_END; in igt_reset_queue()
H A Dselftest_workarounds.c565 *cs++ = MI_BATCH_BUFFER_END; in check_dirty_whitelist()
848 *cs++ = MI_BATCH_BUFFER_END; in scrub_whitelisted_registers()
H A Dselftest_lrc.c2146 *cs++ = MI_BATCH_BUFFER_END; in create_gang()
2712 cs[n] = MI_BATCH_BUFFER_END; in live_preempt_smoke()
3727 } while ((lrc[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in live_lrc_layout()
H A Dintel_lrc.c608 *regs = MI_BATCH_BUFFER_END; in set_offsets()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_cmd_parser.c1456 if (*cmd == MI_BATCH_BUFFER_END) in intel_engine_cmd_parser()
1517 *batch_end = MI_BATCH_BUFFER_END; in intel_engine_cmd_parser()
1522 *cmd = MI_BATCH_BUFFER_END; in intel_engine_cmd_parser()
H A Di915_perf.c1919 *cs++ = MI_BATCH_BUFFER_END; in alloc_noa_wait()
/netbsd-src/sys/external/bsd/drm/dist/shared-core/
H A Di915_reg.h122 #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0) macro