| /netbsd-src/sys/arch/arc/arc/ |
| H A D | c_magnum.c | 80 MIPS_INT_MASK_4,
114 return MIPS_INT_MASK_4; /* Keep clock interrupts enabled */ in timer_magnum_intr()
179 out32(R4030_SYS_EXT_IMASK, cpu_int_mask & (~MIPS_INT_MASK_4 >> 10)); in c_magnum_set_intr()
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| /netbsd-src/sys/arch/ews4800mips/ews4800mips/ |
| H A D | tr2_intr.c | 61 | MIPS_INT_MASK_4,
65 | MIPS_INT_MASK_4
166 if (ipending & MIPS_INT_MASK_4) { /* KBD, MOUSE, SERIAL */ in tr2_intr()
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| H A D | tr2a_intr.c | 195 if ((ipending & MIPS_INT_MASK_4) && (intc_cause & INTC_INT4)) { in tr2a_intr()
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| /netbsd-src/sys/arch/evbmips/gdium/ |
| H A D | gdium_intr.c | 153 MIPS_INT_MASK_4,
160 MIPS_INT_MASK_4 |
310 if ((ipending & (MIPS_INT_MASK_4 << level)) == 0) in evbmips_iointr()
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| /netbsd-src/sys/arch/newsmips/newsmips/ |
| H A D | news3400.c | 122 if (ipending & MIPS_INT_MASK_4) { in news3400_intr()
229 if ((cause & MIPS_INT_MASK_4) != 0) { in news3400_badaddr()
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| H A D | news4000.c | 110 if (ipending & MIPS_INT_MASK_4) { in news4000_intr()
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| H A D | news5000.c | 131 if (ipending & MIPS_INT_MASK_4) { in news5000_intr()
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| /netbsd-src/sys/arch/evbmips/loongson/ |
| H A D | yeeloong_machdep.c | 180 .bonito_mips_intr = MIPS_INT_MASK_4,
201 .bonito_mips_intr = MIPS_INT_MASK_4,
222 .bonito_mips_intr = MIPS_INT_MASK_4,
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| H A D | loongson_intr.c | 83 MIPS_INT_MASK_4,
90 MIPS_INT_MASK_4 |
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| H A D | gdium_machdep.c | 76 .bonito_mips_intr = MIPS_INT_MASK_4,
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| /netbsd-src/sys/arch/hpcmips/tx/ |
| H A D | tx39icu.c | 92 | MIPS_INT_MASK_4,
95 | MIPS_INT_MASK_4,
334 if (!(ipending & MIPS_INT_MASK_4) && in TX_INTR()
345 if (ipending & MIPS_INT_MASK_4) { in TX_INTR()
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| /netbsd-src/sys/arch/evbmips/ingenic/ |
| H A D | intr.c | 74 MIPS_INT_MASK_4 |
82 MIPS_INT_MASK_4 |
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| /netbsd-src/sys/arch/mipsco/include/ |
| H A D | intr.h | 52 #define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3)
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| /netbsd-src/sys/arch/pmax/pmax/ |
| H A D | interrupt.c | 97 MIPS_INT_MASK_3|MIPS_INT_MASK_4)) { in cpu_intr()
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| H A D | dec_3100.c | 217 if (ipending & MIPS_INT_MASK_4) { in dec_3100_intr()
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| H A D | dec_5100.c | 160 if (ipending & MIPS_INT_MASK_4) { in dec_5100_intr()
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| H A D | dec_maxine.c | 340 if (ipending & MIPS_INT_MASK_4) in dec_maxine_intr()
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| H A D | dec_3maxplus.c | 351 if (ipending & MIPS_INT_MASK_4) in dec_3maxplus_intr()
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| H A D | dec_3min.c | 325 if (ipending & MIPS_INT_MASK_4) in dec_3min_intr()
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| /netbsd-src/sys/arch/algor/algor/ |
| H A D | algor_intr.c | 142 MIPS_INT_MASK_3|MIPS_INT_MASK_4)) { in cpu_intr()
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| /netbsd-src/sys/arch/mipsco/mipsco/ |
| H A D | mips_3x30.c | 100 HANDLE_INTR(SYS_INTR_FDC, MIPS_INT_MASK_4); in pizazz_intr()
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| /netbsd-src/sys/arch/sgimips/sgimips/ |
| H A D | cpu.c | 127 if (pending & MIPS_INT_MASK_4) { in cpu_intr()
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| H A D | machdep.c | 136 [IPL_SCHED] = MIPS_INT_MASK_4|MIPS_INT_MASK_2|
145 [IPL_SCHED] = MIPS_INT_MASK_4|MIPS_INT_MASK_3|MIPS_INT_MASK_2|
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| /netbsd-src/sys/arch/mips/atheros/ |
| H A D | ar7100.c | 90 MIPS_INT_MASK_4, /* MISC (UART0/1) */
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| H A D | ar9344.c | 381 MIPS_INT_MASK_4, /* MISC */
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