Searched refs:MDIO (Results 1 – 25 of 46) sorted by relevance
12
73 /* Uses MDC and MDIO */75 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */161 * gpio0igrp cover line 21, 22 used by MDIO for Marvell PHY
145 /* Uses MDC and MDIO */147 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */207 /* Used by MDIO */
58 /* Uses MDC and MDIO */60 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */146 * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
116 /* MDIO */124 /* MDIO reset value */
62 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
145 /* MDIO */153 /* MDIO reset value */
146 /* MDIO */154 /* MDIO reset value */
289 /* MDIO */308 /* MDIO */
74 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
73 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
86 /* MDIO reset value */
327 /* MDIO */335 /* MDIO reset value */
251 /* MDIO */259 /* MDIO reset value */
68 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
56 /* MDIO */
294 /* MDIO */302 /* MDIO reset value */
192 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */360 * gpio0hgrp cover line 21,22 used by RTL8366RB MDIO
359 /* MDIO */369 /* MDIO reset value */
150 * MDIO bus reset is used to generate PHY device reset before
93 /* MDIO */
382 /* MDIO */390 /* MDIO reset value */
100 * "mdio1" is connected to the MDC/MDIO interface of the on-board
295 #define MDIO GP4_RD macro
46 #define MDIO 31 macro
269 * MDIO signal of CP1.