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Searched refs:MC_SEQ_TRAIN_WAKEUP_CNTL__TRAIN_DONE_D1_MASK (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gmc_v6_0.c220 if (RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL) & MC_SEQ_TRAIN_WAKEUP_CNTL__TRAIN_DONE_D1_MASK) in gmc_v6_0_mc_load_microcode()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h9048 #define MC_SEQ_TRAIN_WAKEUP_CNTL__TRAIN_DONE_D1_MASK 0x80000000L macro
H A Dgmc_7_1_sh_mask.h6897 #define MC_SEQ_TRAIN_WAKEUP_CNTL__TRAIN_DONE_D1_MASK 0x80000000 macro
H A Dgmc_8_1_sh_mask.h7811 #define MC_SEQ_TRAIN_WAKEUP_CNTL__TRAIN_DONE_D1_MASK 0x80000000 macro