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Searched refs:MC_SEQ_IO_RESERVE_D0__DPHY0_RSV__SHIFT (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h8127 #define MC_SEQ_IO_RESERVE_D0__DPHY0_RSV__SHIFT 0x00000000 macro
H A Dgmc_7_1_sh_mask.h8696 #define MC_SEQ_IO_RESERVE_D0__DPHY0_RSV__SHIFT 0x0 macro
H A Dgmc_8_1_sh_mask.h9608 #define MC_SEQ_IO_RESERVE_D0__DPHY0_RSV__SHIFT 0x0 macro