Home
last modified time | relevance | path

Searched refs:MC_SEQ_CNTL_2__PLL_TX_PWRON_D0_MASK (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h7966 #define MC_SEQ_CNTL_2__PLL_TX_PWRON_D0_MASK 0x00400000L macro
H A Dgmc_7_1_sh_mask.h6353 #define MC_SEQ_CNTL_2__PLL_TX_PWRON_D0_MASK 0x400000 macro
H A Dgmc_8_1_sh_mask.h7267 #define MC_SEQ_CNTL_2__PLL_TX_PWRON_D0_MASK 0x400000 macro