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Searched refs:MC_SEQ_BIT_REMAP_B3_D1__BIT5__SHIFT (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h7883 #define MC_SEQ_BIT_REMAP_B3_D1__BIT5__SHIFT 0x0000000f macro
H A Dgmc_7_1_sh_mask.h8904 #define MC_SEQ_BIT_REMAP_B3_D1__BIT5__SHIFT 0xf macro
H A Dgmc_8_1_sh_mask.h9816 #define MC_SEQ_BIT_REMAP_B3_D1__BIT5__SHIFT 0xf macro