| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| H A D | c_regmv_imlb_imlb.s | 32 M0 = M0; define
41 M0 = M1; define
44 M3 = M0;
50 R4 = M0;
68 M0 = M2; define
70 M2 = M0;
77 R4 = M0;
95 M0 = M3; define
96 M1 = M0;
104 R4 = M0;
[all …]
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| H A D | c_regmv_imlb_dep_nostall.s | 25 M0 = P4; define
26 R4 = M0;
45 R3 = M0;
125 M0 = P4; define
126 B0 = M0;
153 R3 = M0;
184 M0 = B0; define
192 R0 = M0;
233 M0 = I0; define
234 R4 = M0;
[all …]
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| H A D | m0boundary.s | 13 M0 = 0x0000 (Z); define
14 M0.H = 0x8000;
20 I0 -= M0;
33 M0 = 0x0001 (Z); define
34 M0.H = 0x8000;
40 I0 -= M0;
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| H A D | c_dspldst_ld_dr_ippm.s | 10 M0 = 0 (X); define
20 R0 = [ I0 ++ M0 ];
27 R7 = [ I3 ++ M0 ];
38 R3 = [ I2 ++ M0 ];
41 R6 = [ I1 ++ M0 ];
53 M0 = 4 (X); define
57 R2 = [ I0 ++ M0 ];
64 R1 = [ I3 ++ M0 ];
76 R5 = [ I2 ++ M0 ];
79 R0 = [ I1 ++ M0 ];
[all …]
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| H A D | c_regmv_pr_imlb.s | 22 M0 = P1; define
30 R4 = M0;
48 M0 = P2; define
56 R4 = M0;
74 M0 = P3; define
82 R4 = M0;
100 M0 = P4; define
108 R4 = M0;
126 M0 = P5; define
134 R4 = M0;
[all …]
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| H A D | c_dspldst_st_dr_ippm.s | 17 M0 = 4 (X); define
27 [ I0 ++ M0 ] = R0;
34 [ I3 ++ M0 ] = R4;
38 [ I2 ++ M0 ] = R5;
41 [ I1 ++ M0 ] = R5;
50 R0 = [ I0 ++ M0 ];
57 R7 = [ I3 ++ M0 ];
68 R2 = [ I2 ++ M0 ];
71 R5 = [ I1 ++ M0 ];
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| H A D | c_ldimmhalf_lzhi_ibml.s | 122 M0 = 0x3009 (Z); define
123 M0.H = 0x3008;
135 R4 = M0;
157 M0 = 0x4440 (Z); define
158 M0.H = 0x4000;
169 R4 = M0;
190 M0 = 0xfdd0 (Z); define
191 M0.H = 0xd000;
202 R4 = M0;
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| H A D | c_dagmodim_lz_inc_dec.s | 21 I0 += M0;
32 I3 += M0;
49 I2 -= M0;
58 I3 -= M0;
73 I1 += M0 (BREV);
82 I2 += M0 (BREV);
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| H A D | c_regmv_dr_imlb.s | 21 M0 = R0; define
30 R4 = M0;
55 M0 = R1; define
63 R4 = M0;
88 M0 = R2; define
96 R4 = M0;
121 M0 = R3; define
129 R4 = M0;
154 M0 = R4; define
162 R4 = M0;
[all …]
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| H A D | c_dagmodim_lnz_imltbl.s | 31 I0 += M0;
42 I3 += M0;
59 I2 -= M0;
68 I3 -= M0;
83 I1 += M0 (BREV);
92 I2 += M0 (BREV);
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| H A D | c_dagmodim_lnz_imgebl.s | 31 I0 += M0;
42 I3 += M0;
59 I2 -= M0;
68 I3 -= M0;
83 I1 += M0 (BREV);
92 I2 += M0 (BREV);
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| H A D | c_regmv_imlb_dep_stall.s | 25 M0 = R4; define
26 R3 = M0;
46 R3 = M0;
69 M0 = R0; define
70 R0 = M0;
94 R0 = M0;
232 M0 = R4; define
233 B0 = M0;
261 R3 = M0;
293 M0 = B0; define
[all …]
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| H A D | algnbug2.s | 7 M0 = 1 (X); define
19 I0 += M0;
30 I0 += M0;
41 I0 += M0;
52 I0 += M0;
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| H A D | d0.s | 9 M0 = 8 (X); define
10 I1 -= M0;
17 M0 = 2 (X); define
18 I1 += M0;
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| H A D | cir1.s | 10 imm32 M0, \m
19 I0 += M0;
25 I0 -= M0;
31 I0 += M0;
34 I0 -= M0;
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| H A D | c_ldimmhalf_h_ibml.s | 93 M0.H = 0x3008;
102 R4 = M0;
119 M0.H = 0x4440;
127 R4 = M0;
144 M0.H = 0xfdd0;
152 R4 = M0;
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| H A D | c_ldimmhalf_lz_ibml.s | 94 M0 = 0x3009 (Z); define
103 R4 = M0;
121 M0 = 0x4440 (Z); define
129 R4 = M0;
146 M0 = 0xfdd0 (Z); define
154 R4 = M0;
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| H A D | c_ldimmhalf_l_ibml.s | 93 M0.L = 0x3009;
102 R4 = M0;
119 M0.L = 0x4440;
127 R4 = M0;
144 M0.L = 0xfdd0;
152 R4 = M0;
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| H A D | c_regmv_imlb_dr.s | 97 R0 = M0;
98 R1 = M0;
99 R2 = M0;
100 R3 = M0;
118 R4 = M0;
119 R5 = M0;
120 R6 = M0;
121 R7 = M0;
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| H A D | c_regmv_imlb_pr.s | 88 R0 = M0;
89 P1 = M0;
90 P2 = M0;
91 P3 = M0;
109 P4 = M0;
110 P5 = M0;
111 SP = M0;
112 FP = M0;
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | InfoByHwMode.cpp | 152 unsigned M0 = Map.begin()->first; in operator <() local
153 return get(M0) < I.get(M0); in operator <()
157 unsigned M0 = Map.begin()->first; in operator ==() local
158 return get(M0) == I.get(M0); in operator ==()
162 unsigned M0 = Map.begin()->first; in isSubClassOf() local
163 return get(M0).isSubClassOf(I.get(M0)); in isSubClassOf()
168 unsigned M0 = Map.begin()->first; in hasStricterSpillThan() local
169 const RegSizeInfo &A0 = get(M0); in hasStricterSpillThan()
170 const RegSizeInfo &B0 = I.get(M0); in hasStricterSpillThan()
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| /netbsd-src/external/gpl3/binutils/dist/opcodes/ |
| H A D | ia64-opc-m.c | 24 #define M0 IA64_TYPE_M, 0 macro
104 {"chk.a.nc", M0, OpX3 (0, 4), {R1, TGT25c}, EMPTY},
105 {"chk.a.clr", M0, OpX3 (0, 5), {R1, TGT25c}, EMPTY},
106 {"chk.a.nc", M0, OpX3 (0, 6), {F1, TGT25c}, EMPTY},
107 {"chk.a.clr", M0, OpX3 (0, 7), {F1, TGT25c}, EMPTY},
109 {"invala", M0, OpX3X4X2 (0, 0, 0, 1), {}, EMPTY},
110 {"fwb", M0, OpX3X4X2 (0, 0, 0, 2), {}, EMPTY},
111 {"mf", M0, OpX3X4X2 (0, 0, 2, 2), {}, EMPTY},
112 {"mf.a", M0, OpX3X4X2 (0, 0, 3, 2), {}, EMPTY},
113 {"srlz.d", M0, OpX3X4X2 (0, 0, 0, 3), {}, EMPTY},
[all …]
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| /netbsd-src/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | ia64-opc-m.c | 24 #define M0 IA64_TYPE_M, 0 macro
104 {"chk.a.nc", M0, OpX3 (0, 4), {R1, TGT25c}, EMPTY},
105 {"chk.a.clr", M0, OpX3 (0, 5), {R1, TGT25c}, EMPTY},
106 {"chk.a.nc", M0, OpX3 (0, 6), {F1, TGT25c}, EMPTY},
107 {"chk.a.clr", M0, OpX3 (0, 7), {F1, TGT25c}, EMPTY},
109 {"invala", M0, OpX3X4X2 (0, 0, 0, 1), {}, EMPTY},
110 {"fwb", M0, OpX3X4X2 (0, 0, 0, 2), {}, EMPTY},
111 {"mf", M0, OpX3X4X2 (0, 0, 2, 2), {}, EMPTY},
112 {"mf.a", M0, OpX3X4X2 (0, 0, 3, 2), {}, EMPTY},
113 {"srlz.d", M0, OpX3X4X2 (0, 0, 0, 3), {}, EMPTY},
[all …]
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| /netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/avr/libf7/ |
| H A D | libf7-constdef.h | 29 #define F7_CONST_DEF(NAME, FLAGS, M6, M5, M4, M3, M2, M1, M0, EXPO) \ argument
32 { .flags = FLAGS, .mant = { M0, M1, M2, M3, M4, M5, M6 }, .expo = EXPO };
36 #define F7_CONST_DEF(NAME, FLAGS, M6, M5, M4, M3, M2, M1, M0, EXPO) \ argument
38 { .flags = FLAGS, .mant = { M0, M1, M2, M3, M4, M5, M6 }, .expo = EXPO };
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| /netbsd-src/external/gpl3/gcc/dist/libgcc/config/avr/libf7/ |
| H A D | libf7-constdef.h | 29 #define F7_CONST_DEF(NAME, FLAGS, M6, M5, M4, M3, M2, M1, M0, EXPO) \ argument
32 { .flags = FLAGS, .mant = { M0, M1, M2, M3, M4, M5, M6 }, .expo = EXPO };
36 #define F7_CONST_DEF(NAME, FLAGS, M6, M5, M4, M3, M2, M1, M0, EXPO) \ argument
38 { .flags = FLAGS, .mant = { M0, M1, M2, M3, M4, M5, M6 }, .expo = EXPO };
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