Searched refs:LogicVT (Results 1 – 1 of 1) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 11923 MVT LogicVT = VT; in lowerShuffleAsBitMask() local
11929 LogicVT = in lowerShuffleAsBitMask()
11954 VMask = DAG.getBitcast(LogicVT, VMask); in lowerShuffleAsBitMask()
11955 V = DAG.getBitcast(LogicVT, V); in lowerShuffleAsBitMask()
11956 SDValue And = DAG.getNode(ISD::AND, DL, LogicVT, V, VMask); in lowerShuffleAsBitMask()
21906 MVT LogicVT = VT; in LowerFABSorFNEG() local
21908 LogicVT = (VT == MVT::f64) ? MVT::v2f64 : MVT::v4f32; in LowerFABSorFNEG()
21915 SDValue Mask = DAG.getConstantFP(APFloat(Sem, MaskElt), dl, LogicVT); in LowerFABSorFNEG()
21925 return DAG.getNode(LogicOp, dl, LogicVT, Operand, Mask); in LowerFABSorFNEG()
21929 Operand = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LogicVT, Operand); in LowerFABSorFNEG()
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