| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | ExpandMemCmp.cpp | 337 const LoadPair Loads = in emitLoadCompareByteBlock() local
340 Value *Diff = Builder.CreateSub(Loads.Lhs, Loads.Rhs); in emitLoadCompareByteBlock()
393 const LoadPair Loads = getLoadPair( in getCompareLoadPairs() local
400 Diff = Builder.CreateXor(Loads.Lhs, Loads.Rhs); in getCompareLoadPairs()
405 Cmp = Builder.CreateICmpNE(Loads.Lhs, Loads.Rhs); in getCompareLoadPairs()
486 const LoadPair Loads = in emitLoadCompareBlock() local
493 ResBlock.PhiSrc1->addIncoming(Loads.Lhs, LoadCmpBlocks[BlockIndex]); in emitLoadCompareBlock()
494 ResBlock.PhiSrc2->addIncoming(Loads.Rhs, LoadCmpBlocks[BlockIndex]); in emitLoadCompareBlock()
497 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_EQ, Loads.Lhs, Loads.Rhs); in emitLoadCompareBlock()
599 const LoadPair Loads = in getMemCmpOneBlock() local
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| H A D | ScheduleDAGInstrs.cpp | 761 Value2SUsMap Stores, Loads(1 /*TrueMemOrderLatency*/); in buildSchedGraph() local
907 addBarrierChain(Loads); in buildSchedGraph()
951 addChainDependencies(SU, Loads); in buildSchedGraph()
965 addChainDependencies(SU, (ThisMayAlias ? Loads : NonAliasLoads), V); in buildSchedGraph()
978 addChainDependencies(SU, Loads, UnknownValue); in buildSchedGraph()
987 Loads.insert(SU, UnknownValue); in buildSchedGraph()
998 (ThisMayAlias ? Loads : NonAliasLoads).insert(SU, V); in buildSchedGraph()
1006 if (Stores.size() + Loads.size() >= HugeRegion) { in buildSchedGraph()
1008 reduceHugeMemNodeMaps(Stores, Loads, getReductionSize()); in buildSchedGraph()
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| H A D | WinEHPrepare.cpp | 83 DenseMap<BasicBlock *, Value *> &Loads, Function &F);
1108 DenseMap<BasicBlock *, Value *> Loads; in insertPHILoads() local
1116 replaceUseWithLoad(PN, U, SpillSlot, Loads, F); in insertPHILoads()
1177 DenseMap<BasicBlock *, Value *> &Loads, in replaceUseWithLoad() argument
1237 Value *&Load = Loads[IncomingBlock]; in replaceUseWithLoad()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86PreAMXConfig.cpp | 107 bool checkVolatileModel(SmallSet<Value *, 4> &Loads, IntrinsicInst *Store,
214 bool X86PreAMXConfig::checkVolatileModel(SmallSet<Value *, 4> &Loads, in checkVolatileModel() argument
221 return (Loads.size() == 1) && Loads.contains(ST); in checkVolatileModel()
227 if (!Loads.erase(Op)) in checkVolatileModel()
233 return Loads.empty() && (ST == cast<Value>(KeyAMX)); in checkVolatileModel()
272 SmallSet<Value *, 4> Loads; in getShapesAndConfigPosEnd() local
282 Loads.insert(II); in getShapesAndConfigPosEnd()
284 if (!checkVolatileModel(Loads, II, KeyAMX)) in getShapesAndConfigPosEnd()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 200 SmallVector<LoadInst*, 4> Loads; member in __anon5cd7b9340111::WidenedLoad
205 append_range(Loads, Lds); in WidenedLoad()
229 LoadInst* CreateWideLoad(MemInstList &Loads, IntegerType *LoadTy);
351 SmallVector<LoadInst*, 8> Loads; in RecordMemoryOps() local
366 Loads.push_back(Ld); in RecordMemoryOps()
369 if (Loads.empty() || Loads.size() > NumLoadLimit) in RecordMemoryOps()
379 for (auto Read : Loads) { in RecordMemoryOps()
412 for (auto *Base : Loads) { in RecordMemoryOps()
413 for (auto *Offset : Loads) { in RecordMemoryOps()
736 LoadInst* ARMParallelDSP::CreateWideLoad(MemInstList &Loads, in CreateWideLoad() argument
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| H A D | ARMSelectionDAGInfo.cpp | 205 SDValue Loads[6]; in EmitTargetCodeForMemcpy() local
260 Loads[i] = DAG.getLoad(VT, dl, Chain, in EmitTargetCodeForMemcpy()
264 TFOps[i] = Loads[i].getValue(1); in EmitTargetCodeForMemcpy()
277 TFOps[i] = DAG.getStore(Chain, dl, Loads[i], in EmitTargetCodeForMemcpy()
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| H A D | ARMScheduleM4.td | 47 // Loads, MAC's and DIV all get a higher latency of 2
106 // Loads still take 2 cycles.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/arm/ |
| H A D | cortex-a17.md | 127 ;; Loads of up to two words.
133 ;; Loads of three words.
139 ;; Loads of four words.
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| H A D | cortex-a15.md | 139 ;; Loads of up to two words.
145 ;; Loads of three or four words.
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| H A D | marvell-pj4.md | 167 ;; Loads forward at WR-stage to ALU pipes
174 ;; Loads to stores can back-to-back forward
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| H A D | cortex-a9.md | 103 ;; Loads have a latency of 4 cycles.
113 ;; Loads multiples and store multiples can't be issued for 2 cycles in a
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/ |
| H A D | cortex-a17.md | 127 ;; Loads of up to two words.
133 ;; Loads of three words.
139 ;; Loads of four words.
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| H A D | cortex-a15.md | 139 ;; Loads of up to two words.
145 ;; Loads of three or four words.
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| H A D | marvell-pj4.md | 167 ;; Loads forward at WR-stage to ALU pipes
174 ;; Loads to stores can back-to-back forward
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | DemoteRegToStack.cpp | 69 DenseMap<BasicBlock*, Value*> Loads; in DemoteRegToStack() local
72 Value *&V = Loads[PN->getIncomingBlock(i)]; in DemoteRegToStack()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 269 SmallVector<SDNode*, 4> Loads; in ClusterNeighboringLoads() local
273 Loads.push_back(BaseLoad); in ClusterNeighboringLoads()
279 Loads.push_back(Load); in ClusterNeighboringLoads()
288 SDNode *Lead = Loads[0]; in ClusterNeighboringLoads()
292 for (unsigned I = 1, E = Loads.size(); I != E; ++I) { in ClusterNeighboringLoads()
294 SDNode *Load = Loads[I]; in ClusterNeighboringLoads()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | AliasAnalysisEvaluator.cpp | 104 SetVector<Value *> Loads; in runInternal() local
115 Loads.insert(&Inst); in runInternal()
179 for (Value *Load : Loads) { in runInternal()
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| H A D | CMakeLists.txt | 81 Loads.cpp
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| H A D | ArgumentPromotion.cpp | 659 SmallVector<LoadInst *, 16> Loads; in isSafeToPromoteArgument() local
668 Loads.push_back(LI); in isSafeToPromoteArgument()
697 Loads.push_back(LI); in isSafeToPromoteArgument()
729 if (Loads.empty()) in isSafeToPromoteArgument()
741 for (LoadInst *Load : Loads) { in isSafeToPromoteArgument()
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| /netbsd-src/external/apache2/llvm/lib/libLLVMAnalysis/ |
| H A D | Makefile | 69 Loads.cpp \
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/gn/secondary/llvm/lib/Analysis/ |
| H A D | BUILD.gn | 75 "Loads.cpp",
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/riscv/ |
| H A D | sifive-7.md | 5 ;; Loads, stores, and FP <-> integer moves use the A-pipe.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/riscv/ |
| H A D | sifive-7.md | 5 ;; Loads, stores, and FP <-> integer moves use the A-pipe.
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/sh/ |
| H A D | sh1.md | 32 ;; Loads have a latency of two.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/sh/ |
| H A D | sh1.md | 32 ;; Loads have a latency of two.
|