| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 41 LaneBitmask LaneMask; member
43 RegisterMaskPair(Register RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
44 : RegUnit(RegUnit), LaneMask(LaneMask) {} in RegisterMaskPair()
264 LaneBitmask LaneMask; member
266 IndexMaskPair(unsigned Index, LaneBitmask LaneMask) in IndexMaskPair()
267 : Index(Index), LaneMask(LaneMask) {} in IndexMaskPair()
300 return I->LaneMask; in contains()
307 auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask)); in insert()
309 LaneBitmask PrevMask = InsertRes.first->LaneMask; in insert()
310 InsertRes.first->LaneMask |= Pair.LaneMask; in insert()
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| H A D | ScheduleDAGInstrs.h | 54 LaneBitmask LaneMask; member
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
58 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
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| H A D | LiveInterval.h | 690 LaneBitmask LaneMask; variable
693 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange() argument
696 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() argument
698 : LiveRange(Other, Allocator), LaneMask(LaneMask) {} in SubRange()
780 LaneBitmask LaneMask) { in createSubRange() argument
781 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange()
789 LaneBitmask LaneMask, in createSubRangeFrom() argument
791 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom()
821 LaneBitmask LaneMask,
864 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
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| H A D | TargetRegisterInfo.h | 56 const LaneBitmask LaneMask; variable
205 return LaneMask; in getLaneMask()
386 LaneBitmask LaneMask,
653 LaneBitmask LaneMask) const { in reverseComposeSubRegIndexLaneMask() argument
655 return LaneMask; in reverseComposeSubRegIndexLaneMask()
656 return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask); in reverseComposeSubRegIndexLaneMask()
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| H A D | MachineBasicBlock.h | 104 LaneBitmask LaneMask;
106 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
107 : PhysReg(PhysReg), LaneMask(LaneMask) {}
368 LaneBitmask LaneMask = LaneBitmask::getAll()) {
369 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
390 LaneBitmask LaneMask = LaneBitmask::getAll());
394 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
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| H A D | LiveIntervalCalc.h | 39 void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask,
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| H A D | LiveIntervals.h | 477 LaneBitmask LaneMask);
487 LaneBitmask LaneMask = LaneBitmask::getAll());
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | RegisterPressure.cpp | 101 if (!P.LaneMask.all()) in dump()
102 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
109 if (!P.LaneMask.all()) in dump()
110 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
367 LaneBitmask::getNone(), Pair.LaneMask); in initLiveThru()
378 return I->LaneMask; in getRegLanes()
384 assert(Pair.LaneMask.any()); in addRegLanes()
391 I->LaneMask |= Pair.LaneMask; in addRegLanes()
403 I->LaneMask = LaneBitmask::getNone(); in setRegZero()
410 assert(Pair.LaneMask.any()); in removeRegLanes()
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| H A D | MachineVerifier.cpp | 230 LaneBitmask LaneMask) const;
236 void report_context_lanemask(LaneBitmask LaneMask) const;
246 LaneBitmask LaneMask = LaneBitmask::getNone());
250 LaneBitmask LaneMask = LaneBitmask::getNone());
266 LaneBitmask LaneMask = LaneBitmask::getNone());
517 LaneBitmask LaneMask) const { in report_context()
520 if (LaneMask.any()) in report_context()
521 report_context_lanemask(LaneMask); in report_context()
552 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const { in report_context_lanemask()
553 errs() << "- lanemask: " << PrintLaneMask(LaneMask) << '\n'; in report_context_lanemask()
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| H A D | ScheduleDAGInstrs.cpp | 386 return (RegUse->LaneMask & getLaneMaskForMO(MO)).none(); in deadDefHasNoUse()
436 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() local
438 if ((LaneMask & KillLaneMask).none()) { in addVRegDefDeps()
443 if ((LaneMask & DefLaneMask).any()) { in addVRegDefDeps()
453 LaneMask &= ~KillLaneMask; in addVRegDefDeps()
455 if (LaneMask.any()) { in addVRegDefDeps()
456 I->LaneMask = LaneMask; in addVRegDefDeps()
474 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() local
478 if ((V2SU.LaneMask & LaneMask).none()) in addVRegDefDeps()
497 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps()
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| H A D | LiveIntervals.cpp | 377 Register Reg, LaneBitmask LaneMask) { in extendSegmentsToUses() argument
388 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses()
389 assert(SR.LaneMask == M && "Expecting lane masks to match exactly"); in extendSegmentsToUses()
397 const LiveRange &OldRange = getSubRange(LI, LaneMask); in extendSegmentsToUses()
444 assert(LaneMask.any() && in extendSegmentsToUses()
447 LI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes); in extendSegmentsToUses()
579 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses() local
580 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses()
608 extendSegmentsToUses(NewLR, WorkList, Reg, SR.LaneMask); in shrinkToUses()
778 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
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| H A D | RenameIndependentSubregs.cpp | 183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents() local
187 if ((SR.LaneMask & LaneMask).none()) in findComponents()
227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands() local
232 if ((SR.LaneMask & LaneMask).none()) in rewriteOperands()
285 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask); in distribute()
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| H A D | RegisterCoalescer.cpp | 255 LaneBitmask LaneMask, CoalescerPair &CP,
261 LaneBitmask LaneMask, const CoalescerPair &CP);
988 MaskA |= SA.LaneMask; in removeCopyByCommutingDef()
991 Allocator, SA.LaneMask, in removeCopyByCommutingDef()
1008 if ((SB.LaneMask & MaskA).any()) in removeCopyByCommutingDef()
1231 IntB.computeSubRangeUndefs(Undefs, SR.LaneMask, *MRI, in removePartialRedundancy()
1412 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); in reMaterializeTrivialDef()
1447 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1472 if ((SR.LaneMask & DstMask).none()) { in reMaterializeTrivialDef()
1475 << PrintLaneMask(SR.LaneMask) << " : " << SR << "\n"); in reMaterializeTrivialDef()
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| H A D | LiveInterval.cpp | 884 LaneBitmask LaneMask, in stripValuesNotDefiningMask() argument
914 if ((ExpectedDefMask & LaneMask).none()) in stripValuesNotDefiningMask()
931 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, in refineSubRanges() argument
935 LaneBitmask ToApply = LaneMask; in refineSubRanges()
937 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges()
938 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges()
949 SR.LaneMask = SRMask & ~Matching; in refineSubRanges()
956 stripValuesNotDefiningMask(reg(), SR, SR.LaneMask, Indexes, TRI, in refineSubRanges()
977 LaneBitmask LaneMask, in computeSubRangeUndefs() argument
982 assert((VRegMask & LaneMask).any()); in computeSubRangeUndefs()
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| H A D | SplitKit.cpp | 412 if (S.LaneMask == LM) in getSubRangeForMaskExact()
420 if ((S.LaneMask & LM) == LM) in getSubRangeForMask()
437 auto &PS = getSubRangeForMask(S.LaneMask, Edit->getParent()); in addDeadDef()
461 if ((S.LaneMask & LM).any()) in addDeadDef()
539 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubIdx); in buildSingleSubRegCopy() local
540 DestLI.refineSubRanges(Allocator, LaneMask, in buildSingleSubRegCopy()
549 LaneBitmask LaneMask, MachineBasicBlock &MBB, in buildCopy() argument
552 if (LaneMask.all() || LaneMask == MRI.getMaxLaneMaskForVReg(FromReg)) { in buildCopy()
573 if (!TRI.getCoveringSubRegIndexes(MRI, RC, LaneMask, Indexes)) in buildCopy()
614 LaneBitmask LaneMask; in defFromParent() local
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| H A D | MachineBasicBlock.cpp | 419 if (!LI.LaneMask.all()) in print()
420 OS << ":0x" << PrintLaneMask(LI.LaneMask); in print()
557 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { in removeLiveIn() argument
563 I->LaneMask &= ~LaneMask; in removeLiveIn()
564 if (I->LaneMask.none()) in removeLiveIn()
575 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const { in isLiveIn()
578 return I != livein_end() && (I->LaneMask & LaneMask).any(); in isLiveIn()
592 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns() local
594 LaneMask |= J->LaneMask; in sortUniqueLiveIns()
596 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
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| H A D | RDFRegisters.cpp | 37 if (RC->LaneMask != RI.RegClass->LaneMask) { in PhysicalRegisterInfo()
67 UI.Mask = RC->LaneMask; in PhysicalRegisterInfo()
177 if (RC != nullptr && (RR.Mask & RC->LaneMask) == RC->LaneMask) in aliasRM()
237 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask in mapTo()
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| H A D | VirtRegMap.cpp | 304 LaneBitmask LaneMask; in addLiveInsForSubRanges() local
313 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges()
315 if (LaneMask.none()) in addLiveInsForSubRanges()
318 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
385 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
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| H A D | LiveRangeEdit.cpp | 49 LI.createSubRange(Alloc, S.LaneMask); in createEmptyIntervalFrom()
252 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in useIsKill() local
254 if ((S.LaneMask & LaneMask).any() && S.Query(Idx).isKill()) in useIsKill()
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| H A D | TargetRegisterInfo.cpp | 525 LaneBitmask LaneMask, SmallVectorImpl<unsigned> &NeededIndexes) const { in getCoveringSubRegIndexes() argument
536 if (SubRegMask == LaneMask) { in getCoveringSubRegIndexes()
542 if ((SubRegMask & ~LaneMask).any()) in getCoveringSubRegIndexes()
561 LaneBitmask LanesLeft = LaneMask & ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | LaneBitmask.h | 93 inline Printable PrintLaneMask(LaneBitmask LaneMask) { in PrintLaneMask() argument
94 return Printable([LaneMask](raw_ostream &OS) { in PrintLaneMask()
95 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger()); in PrintLaneMask()
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 107 if (LaneMask.any()) in computeLaneMask()
108 return LaneMask; in computeLaneMask()
111 LaneMask = LaneBitmask::getAll(); in computeLaneMask()
118 LaneMask = M; in computeLaneMask()
119 return LaneMask; in computeLaneMask()
1446 Idx.LaneMask = LaneBitmask::getLane(Bit); in computeSubRegLaneMasks()
1449 Idx.LaneMask = LaneBitmask::getNone(); in computeSubRegLaneMasks()
1468 unsigned DstBit = Idx.LaneMask.getHighestLane(); in computeSubRegLaneMasks()
1469 assert(Idx.LaneMask == LaneBitmask::getLane(DstBit) && in computeSubRegLaneMasks()
1488 assert(Idx2.LaneMask == SrcMask); in computeSubRegLaneMasks()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 234 I->LaneMask |= UsedMask; in collectVirtualRegUses()
253 LiveMask |= S.LaneMask; in getLiveLaneMask()
313 AtMIPressure.inc(U.RegUnit, LiveMask, LiveMask | U.LaneMask, *MRI); in recede()
336 LiveMask |= U.LaneMask; in recede()
372 It.second &= ~S.LaneMask; in advanceBeforeNext()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | RDFCopy.cpp | 124 if ((RC.LaneMask & RR.Mask) == RC.LaneMask) in run()
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| H A D | HexagonBlockRanges.cpp | 240 if (I.LaneMask.all() || (I.LaneMask.any() && !S.isValid())) { in getLiveIns()
246 if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any()) in getLiveIns()
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