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Searched refs:LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7608 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK 0x00040000L macro
H A Ddce_8_0_sh_mask.h3195 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK 0x40000 macro
H A Ddce_10_0_sh_mask.h3117 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK 0x40000 macro
H A Ddce_11_0_sh_mask.h3187 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK 0x40000 macro
H A Ddce_11_2_sh_mask.h3435 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK 0x40000 macro
H A Ddce_12_0_sh_mask.h9267 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK … macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h43250 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK … macro
H A Ddcn_1_0_sh_mask.h40016 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48759 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON_POL_MASK … macro