| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 576 bool IsSignaling = false) const;
579 bool IsSignaling) const;
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| H A D | SystemZISelLowering.cpp | 2579 bool IsSignaling = false) { in getCmp() argument
2599 else if (!IsSignaling) in getCmp()
2843 bool IsSignaling) const { in lowerVectorSETCC()
2846 assert (!IsSignaling || Chain); in lowerVectorSETCC()
2847 CmpMode Mode = IsSignaling ? CmpMode::SignalingFP : in lowerVectorSETCC()
2932 bool IsSignaling) const { in lowerSTRICT_FSETCC()
2941 Chain, IsSignaling); in lowerSTRICT_FSETCC()
2945 Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL, Chain, IsSignaling)); in lowerSTRICT_FSETCC()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/ |
| H A D | IRBuilder.cpp | 883 MDNode *FPMathTag, bool IsSignaling) { in CreateFCmpHelper() argument
885 auto ID = IsSignaling ? Intrinsic::experimental_constrained_fcmps in CreateFCmpHelper()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 1808 bool IsSignaling) { in FloatExpandSetCCOperands() argument
1822 RHSHi, ISD::SETOEQ, Chain, IsSignaling); in FloatExpandSetCCOperands()
1825 RHSLo, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
1830 ISD::SETUNE, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
1833 RHSHi, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
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| H A D | LegalizeTypes.h | 651 SDValue &Chain, bool IsSignaling = false);
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| H A D | TargetLowering.cpp | 308 bool IsSignaling) const { in softenSetCCOperands()
8786 bool IsSignaling) const { in LegalizeSetCCCondCode()
8897 SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode()
8898 SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
8901 SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode()
8902 SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
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| H A D | LegalizeDAG.cpp | 3575 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode() local
3583 NeedInvert, dl, Chain, IsSignaling); in ExpandNode()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Support/ |
| H A D | APFloat.cpp | 2837 bool IsSignaling = str.front() == 's' || str.front() == 'S'; in convertFromStringSpecials() local
2838 if (IsSignaling) { in convertFromStringSpecials()
2849 makeNaN(IsSignaling, IsNegative); in convertFromStringSpecials()
2875 makeNaN(IsSignaling, IsNegative, &Payload); in convertFromStringSpecials()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 12420 bool IsSignaling) { in EmitX86BuiltinExpr() argument
12423 if (IsSignaling) in EmitX86BuiltinExpr()
14382 bool IsSignaling; in EmitX86BuiltinExpr() local
14386 case 0x00: Pred = FCmpInst::FCMP_OEQ; IsSignaling = false; break; in EmitX86BuiltinExpr()
14387 case 0x01: Pred = FCmpInst::FCMP_OLT; IsSignaling = true; break; in EmitX86BuiltinExpr()
14388 case 0x02: Pred = FCmpInst::FCMP_OLE; IsSignaling = true; break; in EmitX86BuiltinExpr()
14389 case 0x03: Pred = FCmpInst::FCMP_UNO; IsSignaling = false; break; in EmitX86BuiltinExpr()
14390 case 0x04: Pred = FCmpInst::FCMP_UNE; IsSignaling = false; break; in EmitX86BuiltinExpr()
14391 case 0x05: Pred = FCmpInst::FCMP_UGE; IsSignaling = true; break; in EmitX86BuiltinExpr()
14392 case 0x06: Pred = FCmpInst::FCMP_UGT; IsSignaling = true; break; in EmitX86BuiltinExpr()
[all …]
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| H A D | CGExprScalar.cpp | 821 llvm::CmpInst::Predicate FCmpOpc, bool IsSignaling);
4000 bool IsSignaling) { in EmitCompare() argument
4096 if (!IsSignaling) in EmitCompare()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1053 bool IsSignaling = false) {
1061 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
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| H A D | TargetLowering.h | 3238 bool IsSignaling = false) const;
4557 bool IsSignaling = false) const;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 5350 bool IsSignaling = Node->getOpcode() == X86ISD::STRICT_FCMPS; in Select() local
5356 Opc = IsSignaling ? X86::COM_Fpr32 : X86::UCOM_Fpr32; in Select()
5359 Opc = IsSignaling ? X86::COM_Fpr64 : X86::UCOM_Fpr64; in Select()
5362 Opc = IsSignaling ? X86::COM_Fpr80 : X86::UCOM_Fpr80; in Select()
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| H A D | X86ISelLowering.cpp | 22906 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerVSETCC() local
22938 if (IsStrict && IsAlwaysSignaling && !IsSignaling) in LowerVSETCC()
22942 if (IsStrict && !IsAlwaysSignaling && IsSignaling) { in LowerVSETCC()
23002 SSECC |= (IsAlwaysSignaling ^ IsSignaling) << 4; in LowerVSETCC()
23492 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC() local
23494 DAG.getNode(IsSignaling ? X86ISD::STRICT_FCMPS : X86ISD::STRICT_FCMP, in LowerSETCC()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| H A D | IRBuilder.h | 2325 bool IsSignaling);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2400 bool IsSignaling) { in emitStrictFPComparison() argument
2405 IsSignaling ? AArch64ISD::STRICT_FCMPE : AArch64ISD::STRICT_FCMP; in emitStrictFPComparison()
6882 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC() local
6901 IsSignaling); in LowerSETCC()
6931 Cmp = emitStrictFPComparison(LHS, RHS, dl, DAG, Chain, IsSignaling); in LowerSETCC()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9805 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerFSETCC() local
9811 DAG, LHS.getValueType(), LHS, RHS, CC, dl, LHS, RHS, Chain, IsSignaling); in LowerFSETCC()
9833 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC()
9837 Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC()
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