| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetCallingConv.h | 30 unsigned IsSExt : 1; ///< Sign extended member
62 : IsZExt(0), IsSExt(0), IsInReg(0), IsSRet(0), IsByVal(0), IsByRef(0), in ArgFlagsTy()
76 bool isSExt() const { return IsSExt; } in isSExt()
77 void setSExt() { IsSExt = 1; } in setSExt()
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| H A D | MachineFrameInfo.h | 518 void setObjectSExt(int ObjectIdx, bool IsSExt) { in setObjectSExt() argument
521 Objects[ObjectIdx+NumFixedObjects].isSExt = IsSExt; in setObjectSExt()
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| H A D | TargetLowering.h | 278 bool IsSExt : 1; variable
297 : IsSExt(false), IsZExt(false), IsInReg(false), IsSRet(false), in ArgListEntry()
3866 bool IsSExt : 1; member
3873 : IsSExt(false), DoesNotReturn(false), IsReturnValueUsed(true), in MakeLibCallOptions()
3877 IsSExt = Value;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 4023 bool IsSExt) { in addPromotedInst() argument
4024 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in addPromotedInst()
4046 bool IsSExt) { in getOrigType() argument
4047 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in getOrigType()
4066 const InstrToOrigTy &PromotedInsts, bool IsSExt);
4104 const TargetLowering &TLI, bool IsSExt);
4154 bool IsSExt) { in canGetThrough() argument
4166 if (IsSExt && isa<SExtInst>(Inst)) in canGetThrough()
4173 ((!IsSExt && BinOp->hasNoUnsignedWrap()) || in canGetThrough()
4174 (IsSExt && BinOp->hasNoSignedWrap()))) in canGetThrough()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMSelectionDAGInfo.cpp | 112 Entry.IsSExt = false; in EmitSpecializedLibcall()
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| H A D | ARMISelLowering.cpp | 9317 Entry.IsSExt = false; in LowerFSINCOS()
9327 Entry.IsSExt = false; in LowerFSINCOS()
18706 Entry.IsSExt = isSigned; in getDivRemArgList()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1988 Entry.IsSExt = TLI.shouldSignExtendTypeInLibCall(ArgVT, isSigned); in ExpandLibCall()
2159 Entry.IsSExt = isSigned; in ExpandDivRemLibCall()
2168 Entry.IsSExt = isSigned; in ExpandDivRemLibCall()
2253 Entry.IsSExt = false; in ExpandSinCosLibCall()
2261 Entry.IsSExt = false; in ExpandSinCosLibCall()
2269 Entry.IsSExt = false; in ExpandSinCosLibCall()
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| H A D | TargetLowering.cpp | 111 IsSExt = Attrs.hasParamAttribute(ArgIdx, Attribute::SExt); in setAttributes()
164 Entry.IsSExt = shouldSignExtendTypeInLibCall(NewOp.getValueType(), in makeLibCall()
165 CallOptions.IsSExt); in makeLibCall()
166 Entry.IsZExt = !Entry.IsSExt; in makeLibCall()
170 Entry.IsSExt = Entry.IsZExt = false; in makeLibCall()
182 bool signExtend = shouldSignExtendTypeInLibCall(RetVT, CallOptions.IsSExt); in makeLibCall()
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| H A D | FastISel.cpp | 1043 if (Arg.IsSExt) in lowerCallTo()
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| H A D | SelectionDAGBuilder.cpp | 9402 Entry.IsSExt = false; in LowerCallTo()
9506 if (Args[i].IsSExt) in LowerCallTo()
9584 if (Args[i].IsSExt) in LowerCallTo()
9609 (ExtendKind != ISD::ANY_EXTEND && CLI.RetSExt == Args[i].IsSExt && in LowerCallTo()
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| H A D | LegalizeIntegerTypes.cpp | 4016 Entry.IsSExt = true; in ExpandIntRes_XMULO()
4024 Entry.IsSExt = true; in ExpandIntRes_XMULO()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 448 Entry.IsSExt = IsSigned; in LowerDivRem()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3440 Entry.IsSExt = false; in LowerFSINCOS()
12129 bool IsSExt = ExtendOpcode == ISD::SIGN_EXTEND || in performCommonVectorExtendCombine() local
12132 if (!IsSExt && ExtendOpcode != ISD::ZERO_EXTEND && in performCommonVectorExtendCombine()
12170 SDValue ExtendNode = DAG.getNode(IsSExt ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in performCommonVectorExtendCombine()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 27927 Entry.IsSExt = false; in LowerWin64_i128OP()
29888 Entry.IsSExt = false; in LowerFSINCOS()
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