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Searched refs:IsLE (Results 1 – 17 of 17) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Object/
H A DDecompressor.cpp21 bool IsLE, bool Is64Bit) { in create() argument
27 : D.consumeCompressedZLibHeader(Is64Bit, IsLE); in create()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Object/
H A DDecompressor.h28 bool IsLE, bool Is64Bit);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td3622 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3623 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3624 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3625 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3626 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3627 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3629 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3630 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3631 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3632 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
[all …]
H A DMipsInstrInfo.td236 def IsLE : Predicate<"Subtarget->isLittle()">;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h619 bool &Swap, bool IsLE);
640 bool &Swap, bool IsLE);
660 unsigned &InsertAtByte, bool &Swap, bool IsLE);
H A DPPCISelLowering.cpp1769 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUHUMShuffleMask() local
1771 if (IsLE) in isVPKUHUMShuffleMask()
1777 if (!IsLE) in isVPKUHUMShuffleMask()
1783 unsigned j = IsLE ? 0 : 1; in isVPKUHUMShuffleMask()
1800 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUWUMShuffleMask() local
1802 if (IsLE) in isVPKUWUMShuffleMask()
1809 if (!IsLE) in isVPKUWUMShuffleMask()
1816 unsigned j = IsLE ? 0 : 2; in isVPKUWUMShuffleMask()
1842 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUDUMShuffleMask() local
1844 if (IsLE) in isVPKUDUMShuffleMask()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/ObjectYAML/
H A DMachOEmitter.cpp331 makeRelocationInfo(const MachOYAML::Relocation &R, bool IsLE) { in makeRelocationInfo() argument
335 if (IsLE) in makeRelocationInfo()
H A DELFEmitter.cpp1944 bool IsLE = Doc.Header.Data == ELFYAML::ELF_ELFDATA(ELF::ELFDATA2LSB); in yaml2elf() local
1947 if (IsLE) in yaml2elf()
1951 if (IsLE) in yaml2elf()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td165 def IsLE : Predicate<"Subtarget->isLittleEndian()">;
2479 let Predicates = [IsLE] in {
2493 let Predicates = [IsLE] in {
2625 let Predicates = [IsLE] in {
2646 let Predicates = [IsLE] in {
2814 let Predicates = [IsLE] in {
2832 let Predicates = [IsLE] in {
3155 let Predicates = [IsLE] in {
3169 let Predicates = [IsLE, UseSTRQro] in {
3254 let Predicates = [IsLE] in {
[all …]
H A DAArch64SVEInstrInfo.td1693 let Predicates = [IsLE] in {
1987 let Predicates = [IsLE] in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMPredicates.td218 def IsLE : Predicate<"MF->getDataLayout().isLittleEndian()">;
H A DARMInstrThumb.td1629 Requires<[IsThumb, IsThumb1Only, IsLE]>;
1631 Requires<[IsThumb, IsThumb1Only, IsLE]>;
1633 Requires<[IsThumb, IsThumb1Only, IsLE]>;
H A DARMInstrNEON.td2427 let Predicates = [IsLE,HasNEON] in {
2452 let Predicates = [IsLE,HasNEON] in {
7442 let Predicates = [IsLE,HasNEON] in {
7936 let Predicates = [HasNEON,IsLE] in {
7961 let Predicates = [HasNEON,IsLE] in {
H A DARMInstrMVE.td7199 let Predicates = [HasMVEInt, IsLE] in {
7358 let Predicates = [IsLE,HasMVEInt] in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp7495 bool IsLE = SI.getModule()->getDataLayout().isLittleEndian(); in splitMergedValStore() local
7502 const bool IsOffsetStore = (IsLE && Upper) || (!IsLE && !Upper); in splitMergedValStore()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp2938 bool IsLE = getDataLayout().isLittleEndian(); in computeKnownBits() local
2957 unsigned Shifts = IsLE ? i : SubScale - 1 - i; in computeKnownBits()
2981 unsigned Shifts = IsLE ? i : NumElts - 1 - i; in computeKnownBits()
3770 bool IsLE = getDataLayout().isLittleEndian(); in ComputeNumSignBits() local
3792 SubOffset = (IsLE ? ((Scale - 1) - SubOffset) : SubOffset); in ComputeNumSignBits()
H A DDAGCombiner.cpp16818 bool IsLE = DAG.getDataLayout().isLittleEndian(); in mergeStoresOfConstantsOrVecElts() local
16820 unsigned Idx = IsLE ? (NumStores - 1 - i) : i; in mergeStoresOfConstantsOrVecElts()
18585 bool IsLE = DAG.getDataLayout().isLittleEndian(); in visitEXTRACT_VECTOR_ELT() local
18588 unsigned BCTruncElt = IsLE ? 0 : NumElts - 1; in visitEXTRACT_VECTOR_ELT()
18602 BCTruncElt = IsLE ? 0 : XBitWidth / VecEltBitWidth - 1; in visitEXTRACT_VECTOR_ELT()