| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 154 AArch64CC::CondCode &CondCode2, bool &Invert) { in changeVectorFCMPPredToAArch64CC() argument
155 Invert = false; in changeVectorFCMPPredToAArch64CC()
162 Invert = true; in changeVectorFCMPPredToAArch64CC()
175 Invert = true; in changeVectorFCMPPredToAArch64CC()
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| H A D | AArch64GlobalISelUtils.h | 76 bool &Invert);
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| H A D | AArch64PostLegalizerLowering.cpp | 930 bool Invert; in lowerVectorFCMP() local
932 changeVectorFCMPPredToAArch64CC(Pred, CC, CC2, Invert); in lowerVectorFCMP()
947 if (Invert) in lowerVectorFCMP()
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| H A D | AArch64InstructionSelector.cpp | 125 bool tryOptAndIntoCompareBranch(MachineInstr &AndInst, bool Invert,
1068 bool Invert) { in emitSelect() argument
1083 if (Invert) { in emitSelect()
1100 if (Invert) { in emitSelect()
1119 if (Invert) { in emitSelect()
1240 static Register getTestBitReg(Register Reg, uint64_t &Bit, bool &Invert, in getTestBitReg() argument
1349 Invert = !Invert; in getTestBitReg()
1397 MachineInstr &AndInst, bool Invert, MachineBasicBlock *DstMBB, in tryOptAndIntoCompareBranch() argument
1433 emitTestBit(TestReg, Bit, Invert, DstMBB, MIB); in tryOptAndIntoCompareBranch()
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| /netbsd-src/external/lgpl3/gmp/dist/mpn/arm/ |
| H A D | invert_limb.asm | 1 dnl ARM mpn_invert_limb -- Invert a normalized limb.
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| /netbsd-src/external/lgpl3/gmp/dist/mpn/powerpc64/mode64/ |
| H A D | invert_limb.asm | 1 dnl PowerPC-64 mpn_invert_limb -- Invert a normalized limb.
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| /netbsd-src/external/lgpl3/gmp/dist/mpn/powerpc64/mode64/p8/ |
| H A D | invert_limb.asm | 1 dnl PowerPC-64 mpn_invert_limb -- Invert a normalized limb.
|
| /netbsd-src/external/lgpl3/gmp/dist/mpn/powerpc32/ |
| H A D | invert_limb.asm | 1 dnl PowerPC-32 mpn_invert_limb -- Invert a normalized limb.
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | StructurizeCFG.cpp | 271 Value *buildCondition(BranchInst *Term, unsigned Idx, bool Invert);
446 bool Invert) { in buildCondition() argument
447 Value *Cond = Invert ? BoolFalse : BoolTrue; in buildCondition()
451 if (Idx != (unsigned)Invert) in buildCondition()
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| /netbsd-src/external/lgpl3/gmp/dist/mpn/arm64/ |
| H A D | invert_limb.asm | 1 dnl ARM64 mpn_invert_limb -- Invert a normalized limb.
|
| /netbsd-src/external/lgpl3/gmp/dist/mpn/alpha/ |
| H A D | invert_limb.asm | 1 dnl Alpha mpn_invert_limb -- Invert a normalized limb.
|
| /netbsd-src/external/lgpl3/gmp/dist/mpn/x86_64/ |
| H A D | invert_limb.asm | 1 dnl AMD64 mpn_invert_limb -- Invert a normalized limb.
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 499 bool Invert = !DefMI; in optimizeSelect() local
506 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect()
523 if (Invert) in optimizeSelect()
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| H A D | LanaiISelLowering.cpp | 1348 bool &Invert, SDValue &OtherOp, in isConditionalZeroOrAllOnes() argument
1358 Invert = false; in isConditionalZeroOrAllOnes()
1363 Invert = true; in isConditionalZeroOrAllOnes()
1379 Invert = true; in isConditionalZeroOrAllOnes()
1388 Invert = !AllOnes; in isConditionalZeroOrAllOnes()
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| H A D | LanaiInstrFormats.td | 301 // (the `I' (Invert sense) bit inverts the sense of the condition):
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| /netbsd-src/external/gpl3/gdb/dist/sim/bfin/ |
| H A D | ChangeLog-2021 | 1313 Invert port->both bit check.
1331 * dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Invert bits to dv_w1c_2.
1332 * dv-bfin_jtag.c (bfin_jtag_io_write_buffer): Invert bits to dv_w1c_4.
1333 * dv-bfin_nfc.c (bfin_nfc_io_write_buffer): Invert bits to dv_w1c_2.
1334 * dv-bfin_otp.c (bfin_otp_io_write_buffer): Invert bits to dv_w1c_2.
1335 * dv-bfin_ppi.c (bfin_ppi_io_write_buffer): Invert bits to dv_w1c_2.
1336 * dv-bfin_rtc.c (bfin_rtc_io_write_buffer): Invert bits to dv_w1c_2.
1337 * dv-bfin_spi.c (bfin_spi_io_write_buffer): Invert bits to dv_w1c_2.
1338 * dv-bfin_twi.c (bfin_twi_io_write_buffer): Invert bits to dv_w1c_2.
1339 * dv-bfin_uart2.c (bfin_uart_io_write_buffer): Invert bits to dv_w1c_2.
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 674 bool Invert) const;
682 bool Invert = false) const;
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| H A D | SystemZISelLowering.cpp | 2766 bool &Invert) { in getVectorComparisonOrInvert() argument
2768 Invert = false; in getVectorComparisonOrInvert()
2774 Invert = true; in getVectorComparisonOrInvert()
2849 bool Invert = false; in lowerVectorSETCC() local
2854 Invert = true; in lowerVectorSETCC()
2871 Invert = true; in lowerVectorSETCC()
2890 if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert)) in lowerVectorSETCC()
2894 if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert)) in lowerVectorSETCC()
2903 if (Invert) { in lowerVectorSETCC()
6494 bool Invert = false; in combineCCMask() local
[all …]
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| /netbsd-src/external/lgpl3/gmp/dist/mpn/ia64/ |
| H A D | invert_limb.asm | 1 dnl IA-64 mpn_invert_limb -- Invert a normalized limb.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/cr16/ |
| H A D | predicates.md | 68 val = ~INTVAL (op); /* Invert and use. */
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/cr16/ |
| H A D | predicates.md | 68 val = ~INTVAL (op); /* Invert and use. */
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsCallingConv.td | 12 class CCIfSubtarget<string F, CCAction A, string Invert = "">
13 : CCIf<!strconcat(Invert,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1168 bool Invert = false; in LowerSETCC() local
1180 Invert = true; in LowerSETCC()
1188 Invert = true; in LowerSETCC()
1206 if (Invert) in LowerSETCC()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 189 template <MVT::SimpleValueType VT, bool Invert = false>
191 return SelectSVELogicalImm(N, VT, Imm, Invert); in SelectSVELogicalImm()
329 bool SelectSVELogicalImm(SDValue N, MVT VT, SDValue &Imm, bool Invert);
3188 bool Invert) { in SelectSVELogicalImm() argument
3193 if (Invert) in SelectSVELogicalImm()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 2368 bool Invert = false; in SpeculativelyExecuteBB() local
2371 Invert = true; in SpeculativelyExecuteBB()
2373 assert(EndBB == BI->getSuccessor(!Invert) && "No edge from to end block"); in SpeculativelyExecuteBB()
2467 if (Invert) in SpeculativelyExecuteBB()
2514 if (Invert) in SpeculativelyExecuteBB()
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