Searched refs:IntelSyntax (Results 1 – 13 of 13) sorted by relevance
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/ |
H A D | i386-opc.h | 701 IntelSyntax, enumerator
|
H A D | i386-opc.tbl | 1074 …Modrm|Vex=3|Space0F|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|… 1076 cvtsi2ss, 0xf30f2a, None, CpuSSE|Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|IntelSyntax, { Reg32… 1171 …Modrm|Vex=3|Space0F|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|… 1173 cvtsi2sd, 0xf20f2a, None, CpuSSE2|Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|IntelSyntax, { Reg3… 1513 …rm|Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { RegXMM|RegYM… 1517 …rm|Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { RegXMM|RegYM… 1527 … CpuAVX, Modrm|VexLIG|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|IntelSyntax, { Reg32|Reg64|… 1529 … CpuAVX, Modrm|VexLIG|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|IntelSyntax, { Reg32|Reg64|… 1532 …rm|Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { RegXMM|RegYM… 2317 …|EVexLIG|Space0F|VexVVVV|Disp8ShiftVL|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|IntelSyntax, { Reg32|Unspec… [all …]
|
H A D | ChangeLog-2008 | 1010 * i386-gen.c (opcode_modifiers): Add IntelSyntax. 1013 * i386-opc.h (IntelSyntax): New.
|
H A D | i386-gen.c | 737 BITFIELD (IntelSyntax),
|
H A D | ChangeLog-2015 | 831 * i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}.
|
/netbsd-src/external/gpl3/binutils/dist/opcodes/ |
H A D | i386-opc.tbl | 92 #define IntelSyntax Dialect=INTEL_SYNTAX 1174 cvtsi2ss, 0xf32a, AVX&x64, Modrm|Vex=3|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|IntelSyntax,… 1176 cvtsi2ss, 0xf30f2a, SSE&x64, Modrm|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Reg64|Unspecified|B… 1269 cvtsi2sd, 0xf22a, AVX&x64, Modrm|Vex=3|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|IntelSyntax,… 1271 cvtsi2sd, 0xf20f2a, SSE2&x64, Modrm|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Reg64|Unspecified|… 1576 $i:Vex:IntelSyntax:RegXMM|RegYMM|Unspecified|BaseIndex, + 1608 vcvtsi2s<sd>, 0x<sd:spfx>2a, AVX, Modrm|VexLIG|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|IntelSyntax,… 2212 $i:AVX512VL:Disp8ShiftVL|IntelSyntax:::RegXMM|RegYMM|Unspecified|BaseIndex:RegXMM, + 2326 …2F, Modrm|EVexLIG|Space0F|VexVVVV|Disp8ShiftVL|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Unspec… 2327 …pace0F|VexVVVV|Disp8ShiftVL|No_bSuf|No_wSuf|No_sSuf|StaticRounding|SAE|IntelSyntax, { Reg64|Unspec… [all …]
|
H A D | ChangeLog-2008 | 1010 * i386-gen.c (opcode_modifiers): Add IntelSyntax. 1013 * i386-opc.h (IntelSyntax): New.
|
H A D | ChangeLog-2015 | 831 * i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}.
|
/netbsd-src/external/gpl3/gdb/dist/opcodes/ |
H A D | ChangeLog-2008 | 1010 * i386-gen.c (opcode_modifiers): Add IntelSyntax. 1013 * i386-opc.h (IntelSyntax): New.
|
H A D | ChangeLog-2015 | 831 * i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}.
|
/netbsd-src/external/gpl3/gdb.old/dist/opcodes/ |
H A D | ChangeLog-2008 | 1010 * i386-gen.c (opcode_modifiers): Add IntelSyntax. 1013 * i386-opc.h (IntelSyntax): New.
|
H A D | ChangeLog-2015 | 831 * i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}.
|
/netbsd-src/external/gpl3/binutils/dist/ |
H A D | ChangeLog.git | 7595 fold them and IntelSyntax into a single, enum-like attribute. Note that
|