| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 90 case ISD::INLINEASM: break; in numberRCValPredInSU()
127 case ISD::INLINEASM: break; in numberRCValSuccInSU()
453 case ISD::INLINEASM: in SUSchedulingCost()
556 case ISD::INLINEASM: in initNumRegDefsLeft()
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| H A D | InstrEmitter.cpp | 1171 case ISD::INLINEASM: in EmitSpecialNode()
1180 : TargetOpcode::INLINEASM; in EmitSpecialNode()
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| H A D | ScheduleDAGFast.cpp | 482 if (Node->getOpcode() == ISD::INLINEASM || in DelayForLiveRegsBottomUp()
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| H A D | SelectionDAGDumper.cpp | 176 case ISD::INLINEASM: return "inlineasm"; in getOperationName()
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| H A D | ScheduleDAGRRList.cpp | 716 case ISD::INLINEASM: in EmitNode()
1362 if (Node->getOpcode() == ISD::INLINEASM || in DelayForLiveRegsBottomUp()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64CompressJumpTables.cpp | 79 if (MI.getOpcode() == AArch64::INLINEASM || in computeBlockSize()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSERegisterInfo.cpp | 103 case Mips::INLINEASM: { in getLoadStoreOffsetSizeInBits()
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| H A D | MipsInstrInfo.cpp | 581 case TargetOpcode::INLINEASM: in getInstSizeInBytes()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorPrint.cpp | 103 BuildMI(*MBB, I, DL, QII->get(TargetOpcode::INLINEASM)) in addAsmInstr()
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| H A D | HexagonMachineScheduler.cpp | 114 case TargetOpcode::INLINEASM: in isResourceAvailable()
170 case TargetOpcode::INLINEASM: in reserveResources()
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| H A D | HexagonInstrInfo.cpp | 2367 case TargetOpcode::INLINEASM: in isLateResultInstr()
2823 case Hexagon::INLINEASM: in isValidOffset()
4487 if (BranchRelaxAsmLarge && MI.getOpcode() == Hexagon::INLINEASM) { in getSize()
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| H A D | HexagonISelLowering.cpp | 666 if ((Op.getOpcode() != ISD::INLINEASM && in LowerINLINEASM()
1503 setOperationAction(ISD::INLINEASM, MVT::Other, Custom); in HexagonTargetLowering()
3120 if (Opc == ISD::INLINEASM || Opc == ISD::INLINEASM_BR) in LowerOperation()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 970 INLINEASM, enumerator
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| H A D | MachineInstr.h | 1250 return getOpcode() == TargetOpcode::INLINEASM ||
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 298 case TargetOpcode::INLINEASM: in getInstSizeInBytes()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 331 case ISD::INLINEASM: in Select()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.cpp | 490 case TargetOpcode::INLINEASM: in getInstSizeInBytes()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.cpp | 354 auto Inst = MIRBuilder.buildInstrNoInsert(TargetOpcode::INLINEASM) in lowerInlineAsm()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyAsmPrinter.cpp | 551 assert(MI->getOpcode() == WebAssembly::INLINEASM); in PrintAsmOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 425 case PPC::INLINEASM: in gatherVectorInstructions()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 532 if (Opcode == ARM::INLINEASM || Opcode == ARM::INLINEASM_BR) in rewriteT2FrameIndex()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeAnalyzer.cpp | 218 STRINGIFY_CODE(CST_CODE, INLINEASM) in GetCodeName()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/ |
| H A D | TargetOpcodes.def | 30 HANDLE_TARGET_OPCODE(INLINEASM)
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 766 case TargetOpcode::INLINEASM: in getInstSizeInBytes()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 1494 case TargetOpcode::INLINEASM: in handleSpecialFP()
|