Searched refs:ILP (Results 1 – 16 of 16) sorted by relevance
103 while providing easy ILP for single-threaded onces. But it is probably
2483 bool LStall = (!checkPref || left->SchedulingPref == Sched::ILP) && in BUCompareLatency()2485 bool RStall = (!checkPref || right->SchedulingPref == Sched::ILP) && in BUCompareLatency()2501 if (!checkPref || (left->SchedulingPref == Sched::ILP || in BUCompareLatency()2502 right->SchedulingPref == Sched::ILP)) { in BUCompareLatency()
277 assert(TLI->getSchedulingPreference() == Sched::ILP && in createDefaultScheduler()
353 The Loop Vectorizer increases the instruction level parallelism (ILP) by
455 dnl /* (the shorthand "ILP" types always have a "P" part) */
581 vhaddps. Long data dependencies negatively impact the ILP (Instruction Level591 which may limit the ILP. Last row, ``<total>``, shows a global average over all
690 SchedPreferenceInfo = Sched::ILP; in TargetLoweringBase()
102 ILP, // Scheduling for ILP in low register pressure mode. enumerator
3172 improve instruction-level parallelism (ILP) using advanced hardware features,3234 opportunities for ILP. Loops can be fully or partially unrolled. Full unrolling
798 ILP instruction level parallelism
3222 ILP:Ile des Pins (Isle of Pines), New Caledonia
1876 return Sched::ILP; in getSchedulingPreference()1891 return Sched::ILP; in getSchedulingPreference()
16314 return Sched::ILP; in getSchedulingPreference()
132 setSchedulingPreference(Sched::ILP); in X86TargetLowering()134 setSchedulingPreference(Sched::ILP); in X86TargetLowering()
9363 C782;C782;110B 1175 11B5;C782;110B 1175 11B5; # (잂; 잂; 잂; 잂; 잂; ) HANGUL SYLLABLE ILP
18461 C782;HANGUL SYLLABLE ILP;Lo;0;L;;;;;N;;;;;