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Searched refs:IA_DEBUG_REG7__shift_prim0_reset_p3_q__SHIFT (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h5415 #define IA_DEBUG_REG7__shift_prim0_reset_p3_q__SHIFT 0x0000001e macro
H A Dgfx_7_2_sh_mask.h16656 #define IA_DEBUG_REG7__shift_prim0_reset_p3_q__SHIFT 0x1e macro
H A Dgfx_8_1_sh_mask.h19568 #define IA_DEBUG_REG7__shift_prim0_reset_p3_q__SHIFT 0x1e macro
H A Dgfx_8_0_sh_mask.h18966 #define IA_DEBUG_REG7__shift_prim0_reset_p3_q__SHIFT 0x1e macro