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Searched refs:HDP_MISC_CNTL (Results 1 – 12 of 12) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dnid.h223 #define HDP_MISC_CNTL 0x2F4C macro
H A Dradeon_ni.c1247 tmp = RREG32(HDP_MISC_CNTL); in cayman_gpu_init()
1249 WREG32(HDP_MISC_CNTL, tmp); in cayman_gpu_init()
H A Dsid.h646 #define HDP_MISC_CNTL 0x2F4C macro
H A Dcikd.h769 #define HDP_MISC_CNTL 0x2F4C macro
H A Devergreend.h437 #define HDP_MISC_CNTL 0x2F4C macro
H A Dradeon_evergreen.c3702 tmp = RREG32(HDP_MISC_CNTL); in evergreen_gpu_init()
3704 WREG32(HDP_MISC_CNTL, tmp); in evergreen_gpu_init()
H A Dradeon_si.c3354 tmp = RREG32(HDP_MISC_CNTL); in si_gpu_init()
3356 WREG32(HDP_MISC_CNTL, tmp); in si_gpu_init()
H A Dradeon_cik.c3423 tmp = RREG32(HDP_MISC_CNTL); in cik_gpu_init()
3425 WREG32(HDP_MISC_CNTL, tmp); in cik_gpu_init()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gmc_v9_0.c1360 WREG32_FIELD15(HDP, 0, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1); in gmc_v9_0_hw_init()
H A Damdgpu_gmc_v7_0.c311 tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 0); in gmc_v7_0_mc_program()
H A Dsid.h650 #define HDP_MISC_CNTL 0xBD3 macro
H A Damdgpu_gmc_v8_0.c513 tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 0); in gmc_v8_0_mc_program()