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Searched refs:GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK (Results 1 – 8 of 8) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h4318 #define GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK 0x00000180L macro
H A Dgfx_7_2_sh_mask.h14621 #define GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK 0x180 macro
H A Dgfx_8_1_sh_mask.h17137 #define GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK 0x180 macro
H A Dgfx_8_0_sh_mask.h16549 #define GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK 0x180 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h4731 #define GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK … macro
H A Dgc_9_2_1_sh_mask.h4109 #define GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK … macro
H A Dgc_9_1_sh_mask.h4203 #define GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK … macro
H A Dgc_10_1_0_sh_mask.h8998 #define GDS_CONFIG__SH3_GPR_PHASE_SEL_MASK … macro