/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
H A D | M68kRegisterInfo.cpp | 49 FramePtr = M68k::A6; in M68kRegisterInfo() 146 setBitVector(FramePtr); in getReservedRegs() 184 BasePtr = (FIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex() 186 BasePtr = (FIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex() 190 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex() 250 if (!MRI->canReserveReg(FramePtr)) in canRealignStack() 262 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
|
H A D | M68kFrameLowering.cpp | 488 unsigned FramePtr = TRI->getFrameRegister(MF); in emitPrologue() local 489 const unsigned MachineFramePtr = FramePtr; in emitPrologue() 570 BuildMI(MBB, MBBI, DL, TII.get(M68k::MOV32aa), FramePtr) in emitPrologue() 640 FramePtr, true, in emitPrologue() 686 unsigned FramePtr = TRI->getFrameRegister(MF); in emitEpilogue() local 687 unsigned MachineFramePtr = FramePtr; in emitEpilogue() 748 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), FramePtr, false, in emitEpilogue() 753 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr).addReg(FramePtr); in emitEpilogue()
|
H A D | M68kRegisterInfo.h | 37 unsigned FramePtr; variable
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Coroutines/ |
H A D | CoroSplit.cpp | 168 const coro::Shape &Shape, Value *FramePtr, in maybeFreeRetconStorage() argument 175 Shape.emitDealloc(Builder, FramePtr, CG); in maybeFreeRetconStorage() 225 const coro::Shape &Shape, Value *FramePtr, in replaceFallthroughCoroEnd() argument 252 maybeFreeRetconStorage(Builder, Shape, FramePtr, CG); in replaceFallthroughCoroEnd() 259 maybeFreeRetconStorage(Builder, Shape, FramePtr, CG); in replaceFallthroughCoroEnd() 283 Value *FramePtr, bool InResume, in replaceUnwindCoroEnd() argument 299 maybeFreeRetconStorage(Builder, Shape, FramePtr, CG); in replaceUnwindCoroEnd() 313 Value *FramePtr, bool InResume, CallGraph *CG) { in replaceCoroEnd() argument 315 replaceUnwindCoroEnd(End, Shape, FramePtr, InResume, CG); in replaceCoroEnd() 317 replaceFallthroughCoroEnd(End, Shape, FramePtr, InResume, CG); in replaceCoroEnd() [all …]
|
H A D | CoroFrame.cpp | 1070 DBuilder.insertDeclare(Shape.FramePtr, FrameDIVar, in buildFrameDebugInfo() 1072 Shape.FramePtr->getNextNode()); in buildFrameDebugInfo() 1467 Shape.FramePtr = in createFramePtr() 1499 Instruction *FramePtr = Shape.FramePtr; in insertSpills() local 1525 Builder.CreateInBoundsGEP(FrameTy, FramePtr, Indices)); in insertSpills() 1550 InsertPt = FramePtr->getNextNode(); in insertSpills() 1565 InsertPt = FramePtr->getNextNode(); in insertSpills() 1589 FrameTy, FramePtr, 0, Index, Def->getName() + Twine(".spill.addr")); in insertSpills() 1642 BasicBlock *FramePtrBB = FramePtr->getParent(); in insertSpills() 1645 FramePtrBB->splitBasicBlock(FramePtr->getNextNode(), "AllocaSpillBB"); in insertSpills() [all …]
|
H A D | CoroCleanup.cpp | 49 auto *FramePtr = Builder.CreateBitCast(FrameRaw, FramePtrTy); in lowerSubFn() local 50 auto *Gep = Builder.CreateConstInBoundsGEP2_32(FrameTy, FramePtr, 0, Index); in lowerSubFn()
|
H A D | CoroInternal.h | 125 Instruction *FramePtr; member
|
H A D | Coroutines.cpp | 240 Shape.FramePtr = nullptr; in clear()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.cpp | 113 unsigned FIOperandNum, int Offset, unsigned FramePtr) { in replaceFI() argument 118 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false); in replaceFI() 138 .addReg(FramePtr); in replaceFI() 156 .addReg(FramePtr); in replaceFI()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.h | 44 unsigned FramePtr; variable 144 Register getFramePtr() const { return FramePtr; } in getFramePtr()
|
H A D | X86FrameLowering.cpp | 446 const Register FramePtr = TRI->getFrameRegister(MF); in emitCalleeSavedFrameMoves() local 448 STI.isTarget64BitILP32() ? Register(getX86SubSuperRegister(FramePtr, 64)) in emitCalleeSavedFrameMoves() 449 : FramePtr; in emitCalleeSavedFrameMoves() 1341 Register FramePtr = TRI->getFrameRegister(MF); in emitPrologue() local 1344 ? Register(getX86SubSuperRegister(FramePtr, 64)) : FramePtr; in emitPrologue() 1481 .addImm(FramePtr) in emitPrologue() 1490 FramePtr) in emitPrologue() 1513 BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr) in emitPrologue() 1538 .addImm(FramePtr) in emitPrologue() 1734 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr), in emitPrologue() [all …]
|
H A D | X86RegisterInfo.cpp | 67 FramePtr = Use64BitReg ? X86::RBP : X86::EBP; in X86RegisterInfo() 72 FramePtr = X86::EBP; in X86RegisterInfo() 673 if (!MRI->canReserveReg(FramePtr)) in canRealignStack() 781 assert(BasePtr == FramePtr && "Expected the FP as base register"); in eliminateFrameIndex() 854 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | Thumb1FrameLowering.cpp | 169 Register FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 226 if (Reg == FramePtr) in emitPrologue() 304 BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue() 312 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset)); in emitPrologue() 319 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue() 381 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) { in emitPrologue() 488 Register FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 519 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 526 .addReg(FramePtr) in emitEpilogue() 536 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) { in emitEpilogue()
|
H A D | ARMFrameLowering.cpp | 455 Register FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 514 if (Reg == FramePtr) in emitPrologue() 687 dl, TII, FramePtr, ARM::SP, in emitPrologue() 692 nullptr, MRI->getDwarfRegNum(FramePtr, true), in emitPrologue() 700 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue() 873 Register FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 913 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, in emitEpilogue() 926 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 937 .addReg(FramePtr) in emitEpilogue() 943 .addReg(FramePtr) in emitEpilogue() [all …]
|
H A D | ARMAsmPrinter.cpp | 1093 Register FramePtr = TargetRegInfo->getFrameRegister(MF); in EmitUnwindingInstruction() local 1227 if (DstReg == FramePtr && FramePtr != ARM::SP) in EmitUnwindingInstruction() 1230 ATS.emitSetFP(FramePtr, ARM::SP, -Offset); in EmitUnwindingInstruction() 1296 unsigned FramePtr = STI.useR7AsFramePointer() ? ARM::R7 : ARM::R11; in emitInstruction() local 2042 .addReg(FramePtr) in emitInstruction() 2112 .addReg(FramePtr) in emitInstruction()
|
H A D | ARMExpandPseudoInsts.cpp | 2257 Register FramePtr = RI.getFrameRegister(MF); in ExpandMI() local 2263 FramePtr, -NumBytes, ARMCC::AL, 0, *TII); in ExpandMI() 2266 FramePtr, -NumBytes, *TII, RI); in ExpandMI() 2269 FramePtr, -NumBytes, ARMCC::AL, 0, in ExpandMI()
|
H A D | ARMFastISel.cpp | 2494 Register FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); in SelectIntrinsicCall() local 2495 unsigned SrcReg = FramePtr; in SelectIntrinsicCall()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 34 static const unsigned FramePtr = XCore::R10; variable 151 FramePtr)); in GetSpillList() 307 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0); in emitPrologue() 310 MRI->getDwarfRegNum(FramePtr, true)); in emitPrologue() 386 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr); in emitEpilogue()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/DebugInfo/CodeView/ |
H A D | SymbolRecordMapping.cpp | 504 case EncodedFramePtrReg::FramePtr: return RegisterId::EBP; in decodeFramePtrReg() 512 case EncodedFramePtrReg::FramePtr: return RegisterId::RBP; in decodeFramePtrReg() 537 return EncodedFramePtrReg::FramePtr; in encodeFramePtrReg() 549 return EncodedFramePtrReg::FramePtr; in encodeFramePtrReg()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | SjLjEHPrepare.cpp | 403 Value *FramePtr = Builder.CreateConstGEP2_32(doubleUnderJBufTy, JBufPtr, 0, 0, in setupEntryBlockAndCallSites() local 407 Builder.CreateStore(Val, FramePtr, /*isVolatile=*/true); in setupEntryBlockAndCallSites()
|
/netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/ |
H A D | SemaCoroutine.cpp | 329 Expr *FramePtr = in buildCoroutineHandle() local 338 return S.BuildCallExpr(nullptr, FromAddr.get(), Loc, FramePtr, Loc); in buildCoroutineHandle() 1375 Expr *FramePtr = in makeNewAndDeleteExpr() local 1408 buildBuiltinCall(S, Loc, Builtin::BI__builtin_coro_free, {FramePtr}); in makeNewAndDeleteExpr()
|
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/ |
H A D | CodeView.h | 539 FramePtr = 2, enumerator
|
/netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
H A D | Coroutines.rst | 375 %inc.spill.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 2 506 define internal fastcc void @f.Resume(%f.Frame* %FramePtr) { 508 %index.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i64 0, i32 2 511 %n.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i64 0, i32 3
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
H A D | CodeViewDebug.cpp | 1395 CurFn->EncodedParamFramePtrReg = EncodedFramePtrReg::FramePtr; in beginFunctionImpl() 1402 CurFn->EncodedLocalFramePtrReg = EncodedFramePtrReg::FramePtr; in beginFunctionImpl()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.cpp | 1578 Register FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 1581 unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true); in emitPrologue()
|