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Searched refs:FSUB (Results 1 – 25 of 91) sorted by relevance

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/netbsd-src/bin/pax/
H A Dextern.h200 extern FSUB fsub[];
227 extern FSUB *frmt;
H A Dpax.h225 } FSUB; typedef
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Drx-parse.h123 FSUB = 324, /* FSUB */ enumerator
292 #define FSUB 324 macro
H A Drx-parse.y161 %token FADD FCMP FDIV FMUL FREIT FSUB FSQRT FTOD FTOI FTOU
674 | FSUB { sub_op = 0; } float3_op
1395 OPC(FSUB),
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Drx-parse.h123 FSUB = 324, /* FSUB */ enumerator
292 #define FSUB 324 macro
/netbsd-src/sys/arch/m68k/fpsp/
H A Dscosh.sa138 FSUB.D T1(pc),FP0 ...(|X|-16381LOG2_LEAD)
139 FSUB.D T2(pc),FP0 ...|X| - 16381 LOG2, ACCURATE
H A Dssinh.sa142 FSUB.D T1(pc),FP0 ...(|X|-16381LOG2_LEAD)
149 FSUB.D T2(pc),FP0 ...|X| - 16381 LOG2, ACCURATE
H A Dssin.sa242 FSUB.X (A1)+,FP0 ...X-Y1
244 FSUB.S (A1),FP0 ...FP0 IS R = (X-Y1)-Y2
398 FSUB.S #:00800000,FP0 ;last inst - possible exception set
497 FSUB.S TWOTO63(a6),FP2 ...FP2 is N
596 FSUB.X (A1)+,FP0 ...X-Y1
597 FSUB.S (A1),FP0 ...FP0 IS R = (X-Y1)-Y2
765 FSUB.S #:00800000,FP1
H A Dstwotox.sa286 FSUB.X FP1,FP0 ...X - (1/64)*INT(64 X)
392 FSUB.X FP1,FP0 ...X - N L_LEAD
395 FSUB.X FP2,FP0 ...X - N L_TRAIL
H A Dslogn.sa400 FSUB.X F(a6),FP0 ...Y-F
451 FSUB.S one,FP1 ...FP1 IS X-1
570 FSUB.X F(a6),FP0 ...2-F
588 FSUB.X F(a6),FP0 ...1-F
H A Dstan.sa227 FSUB.X (a1)+,FP0 ...X-Y1
230 FSUB.S (a1),FP0 ...FP0 IS R = (X-Y1)-Y2
428 FSUB.S TWOTO63(a6),FP2 ...FP2 is N
H A Dsasin.sa101 FSUB.X FP0,FP1 ...1-X
/netbsd-src/external/gpl3/gcc/dist/gcc/config/sh/
H A Dsh4a.md174 ;; FCMP/GT, FADD, FLOAT, FMAC, FMUL, FSUB, FTRC, FRVHG, FSCHG
204 ;; Double-precision floating-point (FADD,FMUL,FSUB)
H A Dsh4-300.md238 ;; Single precision floating point (FADD,FLOAT,FMAC,FMUL,FSUB,FTRC)
239 ;; Double-precision floating-point (FADD,FCNVDS,FCNVSD,FLOAT,FSUB,FTRC)
H A Dsh4.md372 ;; FCMP/GT, FADD, FLOAT, FMAC, FMUL, FSUB, FTRC, FRCHG, FSCHG
415 ;; Double-precision floating-point (FADD,FMUL,FSUB)
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/sh/
H A Dsh4a.md174 ;; FCMP/GT, FADD, FLOAT, FMAC, FMUL, FSUB, FTRC, FRVHG, FSCHG
204 ;; Double-precision floating-point (FADD,FMUL,FSUB)
H A Dsh4-300.md238 ;; Single precision floating point (FADD,FLOAT,FMAC,FMUL,FSUB,FTRC)
239 ;; Double-precision floating-point (FADD,FCNVDS,FCNVSD,FLOAT,FSUB,FTRC)
H A Dsh4.md372 ;; FCMP/GT, FADD, FLOAT, FMAC, FMUL, FSUB, FTRC, FRCHG, FSCHG
415 ;; Double-precision floating-point (FADD,FMUL,FSUB)
/netbsd-src/sys/arch/m68k/fpe/
H A DREADME68 FGETMAN, FDIV, FADD, FMUL, FSGLDIV(*), FSCALE, FSGLMUL(*), FSUB,
120 instance, the parts calling FSQRT, FSUB, FADD and FTST look like:
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/
H A DConstrainedOps.def53 DAG_INSTRUCTION(FSub, 2, 1, experimental_constrained_fsub, FSUB)
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h372 FSUB, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp375 case ISD::FSUB: in LegalizeOp()
769 case ISD::FSUB: in Expand()
1326 if (TLI.isOperationLegalOrCustom(ISD::FSUB, Node->getValueType(0))) { in ExpandFNEG()
1330 return DAG.getNode(ISD::FSUB, DL, Node->getValueType(0), Zero, in ExpandFNEG()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp232 { ISD::FSUB, MVT::v2f64, 2 }, // subpd in getArithmeticInstrCost()
619 { ISD::FSUB, MVT::v8f64, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
624 { ISD::FSUB, MVT::v16f32, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
792 { ISD::FSUB, MVT::v4f64, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
793 { ISD::FSUB, MVT::v8f32, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
854 { ISD::FSUB, MVT::f64, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
855 { ISD::FSUB, MVT::f32 , 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
856 { ISD::FSUB, MVT::v2f64, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
857 { ISD::FSUB, MVT::v4f32, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
943 { ISD::FSUB, MVT::f32, 2 }, // Pentium IV from http://www.agner.org/ in getArithmeticInstrCost()
[all …]
/netbsd-src/sys/arch/m68k/m68k/
H A Ddb_disasm.h374 #define FSUB ENCFT(1,0,1,0,0,0) macro
/netbsd-src/sys/arch/sparc/include/
H A Dinstr.h411 #define FSUB 0x44 macro

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