| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 905 FSINCOS, enumerator
|
| /netbsd-src/sys/arch/m68k/fpe/ |
| H A D | README | 71 FCOSH, FSINH, FTANH, FCOS, FSIN, FTAN, FSINCOS,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 202 case ISD::FSINCOS: return "fsincos"; in getOperationName()
|
| H A D | LegalizeDAG.cpp | 2219 if (User->getOpcode() == OtherOpcode || User->getOpcode() == ISD::FSINCOS) in useSinCos()
3159 if ((TLI.isOperationLegalOrCustom(ISD::FSINCOS, VT) || in ExpandNode()
3163 Tmp1 = DAG.getNode(ISD::FSINCOS, dl, VTs, Node->getOperand(0)); in ExpandNode()
3973 case ISD::FSINCOS: in ConvertNodeToLibcall()
|
| /netbsd-src/sys/arch/m68k/fpsp/ |
| H A D | do_func.sa | 496 * FSINCOS
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ScheduleAtom.td | 892 def : InstRW<[AtomWrite01_174], (instrs FSINCOS, FSIN, FCOS)>;
|
| H A D | X86InstrFPStack.td | 749 def FSINCOS : I<0xD9, MRM_FB, (outs), (ins), "fsincos", []>;
|
| H A D | X86ISelLowering.cpp | 583 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
615 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in X86TargetLowering()
621 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in X86TargetLowering()
636 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
702 setOperationAction(ISD::FSINCOS, MVT::f80, Expand); in X86TargetLowering()
753 setOperationAction(ISD::FSINCOS, MVT::f128, LibCall); in X86TargetLowering()
804 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
1974 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in X86TargetLowering()
1975 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in X86TargetLowering()
30388 case ISD::FSINCOS: return LowerFSINCOS(Op, Subtarget, DAG); in LowerOperation()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1627 setOperationAction(ISD::FSINCOS, MVT::f128, Expand); in SparcTargetLowering()
1632 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in SparcTargetLowering()
1637 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in SparcTargetLowering()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 353 setOperationAction(ISD::FSINCOS, VT, Expand); in AArch64TargetLowering()
429 setOperationAction(ISD::FSINCOS, MVT::f128, Expand); in AArch64TargetLowering()
588 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in AArch64TargetLowering()
589 setOperationAction(ISD::FSINCOS, MVT::v4f16, Expand); in AArch64TargetLowering()
590 setOperationAction(ISD::FSINCOS, MVT::v8f16, Expand); in AArch64TargetLowering()
800 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in AArch64TargetLowering()
801 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in AArch64TargetLowering()
803 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in AArch64TargetLowering()
804 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in AArch64TargetLowering()
973 setOperationAction(ISD::FSINCOS, MVT::v1f64, Expand); in AArch64TargetLowering()
[all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1593 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in HexagonTargetLowering()
1642 ISD::FMINNUM, ISD::FMAXNUM, ISD::FSINCOS, in HexagonTargetLowering()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 109 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 437 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in MipsTargetLowering()
438 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in MipsTargetLowering()
|
| H A D | MipsSEISelLowering.cpp | 150 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in MipsSETargetLowering()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1388 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in ARMTargetLowering()
1389 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in ARMTargetLowering()
1431 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in ARMTargetLowering()
1432 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in ARMTargetLowering()
1470 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in ARMTargetLowering()
9937 case ISD::FSINCOS: return LowerFSINCOS(Op, DAG); in LowerOperation()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 367 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in PPCTargetLowering()
372 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in PPCTargetLowering()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 467 setOperationAction(ISD::FSINCOS, VT, Expand); in SystemZTargetLowering()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 304 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FP16_TO_FP, in RISCVTargetLowering()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 9564 case ISD::FSINCOS: in isCanonicalized()
|