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Searched refs:FROUND (Results 1 – 24 of 24) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/
H A DConstrainedOps.def93 DAG_FUNCTION(round, 1, 0, experimental_constrained_round, FROUND)
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h873 FROUND, enumerator
H A DBasicTTIImpl.h1586 ISDs.push_back(ISD::FROUND); in getTypeBasedIntrinsicInstrCost()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp503 case Intrinsic::round: Opcode = ISD::FROUND; break; in mightUseCTR()
612 Opcode = ISD::FROUND; break; in mightUseCTR()
H A DPPCISelLowering.cpp411 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
416 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
969 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in PPCTargetLowering()
970 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
975 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
976 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
1170 setOperationAction(ISD::FROUND, MVT::f128, Legal); in PPCTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstrInfo.td264 def AMDGPUround : SDNode<"ISD::FROUND",
H A DAMDGPUISelLowering.cpp304 setOperationAction(ISD::FROUND, MVT::f32, Custom); in AMDGPUTargetLowering()
305 setOperationAction(ISD::FROUND, MVT::f64, Custom); in AMDGPUTargetLowering()
1249 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
H A DSIISelLowering.cpp558 setOperationAction(ISD::FROUND, MVT::f16, Custom); in SITargetLowering()
9378 case ISD::FROUND: in fp16SrcZerosHighBits()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp541 setOperationAction(ISD::FROUND, MVT::f16, Promote); in NVPTXTargetLowering()
542 setOperationAction(ISD::FROUND, MVT::v2f16, Expand); in NVPTXTargetLowering()
543 setOperationAction(ISD::FROUND, MVT::f32, Custom); in NVPTXTargetLowering()
544 setOperationAction(ISD::FROUND, MVT::f64, Custom); in NVPTXTargetLowering()
2184 case ISD::FROUND: in LowerOperation()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp213 case ISD::FROUND: return "fround"; in getOperationName()
H A DLegalizeFloatTypes.cpp115 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; in SoftenFloatResult()
1230 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; in ExpandFloatResult()
2239 case ISD::FROUND: in PromoteFloatResult()
2604 case ISD::FROUND: in SoftPromoteHalfResult()
H A DLegalizeVectorOps.cpp429 case ISD::FROUND: in LegalizeOp()
H A DLegalizeVectorTypes.cpp97 case ISD::FROUND: in ScalarizeVectorResult()
991 case ISD::FROUND: in SplitVectorResult()
3117 case ISD::FROUND: in WidenVectorResult()
H A DLegalizeDAG.cpp4034 case ISD::FROUND: in ConvertNodeToLibcall()
4731 case ISD::FROUND: in PromoteNode()
H A DSelectionDAGBuilder.cpp6228 case Intrinsic::round: Opcode = ISD::FROUND; break; in visitIntrinsicCall()
7967 if (visitUnaryFloatCall(I, ISD::FROUND)) in visitCall()
H A DSelectionDAG.cpp4301 case ISD::FROUND: in isKnownNeverNaN()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp802 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
873 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp624 setOperationAction(ISD::FROUND, MVT::f16, Promote); in AArch64TargetLowering()
644 setOperationAction(ISD::FROUND, MVT::v4f16, Expand); in AArch64TargetLowering()
669 setOperationAction(ISD::FROUND, MVT::v8f16, Expand); in AArch64TargetLowering()
689 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
707 setOperationAction(ISD::FROUND, MVT::f16, Legal); in AArch64TargetLowering()
969 setOperationAction(ISD::FROUND, MVT::v1f64, Expand); in AArch64TargetLowering()
1100 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
1111 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
1237 setOperationAction(ISD::FROUND, VT, Custom); in AArch64TargetLowering()
1483 setOperationAction(ISD::FROUND, VT, Custom); in addTypeForFixedLengthSVE()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp461 setOperationAction(ISD::FROUND, VT, Legal); in SystemZTargetLowering()
518 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in SystemZTargetLowering()
550 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in SystemZTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td488 def fround : SDNode<"ISD::FROUND" , SDTFPUnaryOp>;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1641 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp157 setOperationAction(ISD::FROUND, MVT::f16, Promote); in MipsSETargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp356 setOperationAction(ISD::FROUND, VT, Legal); in addMVEVectorTypes()
1439 setOperationAction(ISD::FROUND, MVT::f32, Legal); in ARMTargetLowering()
1455 setOperationAction(ISD::FROUND, MVT::f64, Legal); in ARMTargetLowering()
1479 setOperationAction(ISD::FROUND, MVT::f16, Legal); in ARMTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp1134 setOperationAction(ISD::FROUND, RoundedTy, Custom); in X86TargetLowering()
1236 setOperationAction(ISD::FROUND, VT, Custom); in X86TargetLowering()
1622 setOperationAction(ISD::FROUND, VT, Custom); in X86TargetLowering()
30318 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
40823 case ISD::FROUND: in scalarizeExtEltFP()