Home
last modified time | relevance | path

Searched refs:ExtType (Results 1 – 25 of 54) sorted by relevance

123

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.h61 struct ExtType { struct
64 ExtType() = default;
65 ExtType(char t, uint16_t w) : Type(t), Width(w) {} in ExtType() argument
71 using RegExtMap = DenseMap<unsigned, ExtType>;
H A DHexagonBitTracker.cpp83 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::SExt, Width))); in HexagonEvaluator()
85 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::ZExt, Width))); in HexagonEvaluator()
1236 if (F->second.Type == ExtType::SExt) in evaluateFormalCopy()
1238 else if (F->second.Type == ExtType::ZExt) in evaluateFormalCopy()
H A DHexagonISelDAGToDAG.cpp76 ISD::LoadExtType ExtType = LD->getExtensionType(); in SelectIndexedLoad() local
77 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in SelectIndexedLoad()
131 auto getExt64 = [this,ExtType] (MachineSDNode *N, const SDLoc &dl) in SelectIndexedLoad()
133 if (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD) { in SelectIndexedLoad()
138 if (ExtType == ISD::SEXTLOAD) in SelectIndexedLoad()
149 if (ValueVT == MVT::i64 && ExtType != ISD::NON_EXTLOAD) { in SelectIndexedLoad()
/netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/
H A DCGOpenCLRuntime.cpp64 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in convertOpenCLSpecificType() argument
67 llvm::StructType::create(Ctx, "opencl." #ExtType), AddrSpc); in convertOpenCLSpecificType()
H A DCGDebugInfo.h81 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ argument
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1192 getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain,
1199 getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain,
1204 return getExtLoad(ExtType, dl, VT, Chain, Ptr, PtrInfo, MemVT,
1207 SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1212 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1219 ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl,
1225 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
1231 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1237 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
1240 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
H A DTargetLowering.h1220 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, in getLoadExtAction() argument
1225 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::LAST_VALUETYPE && in getLoadExtAction()
1227 unsigned Shift = 4 * ExtType; in getLoadExtAction()
1232 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegal() argument
1233 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
1238 bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegalOrCustom() argument
1239 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
1240 getLoadExtAction(ExtType, ValVT, MemVT) == Custom; in isLoadExtLegalOrCustom()
2173 void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, in setLoadExtAction() argument
2175 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValVT.isValid() && in setLoadExtAction()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kInstrInfo.td491 ISD::LoadExtType ExtType = LD->getExtensionType();
492 if (ExtType == ISD::NON_EXTLOAD)
494 if (ExtType == ISD::EXTLOAD)
501 ISD::LoadExtType ExtType = LD->getExtensionType();
502 if (ExtType == ISD::NON_EXTLOAD)
504 if (ExtType == ISD::EXTLOAD)
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp1008 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::getArithExtendType(Val); in printArithExtend() local
1014 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { in printArithExtend()
1018 ExtType == AArch64_AM::UXTX) || in printArithExtend()
1020 ExtType == AArch64_AM::UXTW) ) { in printArithExtend()
1026 O << ", " << AArch64_AM::getShiftExtendName(ExtType); in printArithExtend()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1689 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_LOAD() local
1708 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
1715 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, MPI, in SplitVecRes_LOAD()
1742 ISD::LoadExtType ExtType = MLD->getExtensionType(); in SplitVecRes_MLOAD() local
1773 MMO, MLD->getAddressingMode(), ExtType, in SplitVecRes_MLOAD()
1798 HiMemVT, MMO, MLD->getAddressingMode(), ExtType, in SplitVecRes_MLOAD()
1827 ISD::LoadExtType ExtType = MGT->getExtensionType(); in SplitVecRes_MGATHER() local
1863 MMO, MGT->getIndexType(), ExtType); in SplitVecRes_MGATHER()
1867 MMO, MGT->getIndexType(), ExtType); in SplitVecRes_MGATHER()
2519 ISD::LoadExtType ExtType = MGT->getExtensionType(); in SplitVecOp_MGATHER() local
[all …]
H A DLegalizeDAG.cpp671 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeLoadOps() local
672 if (ExtType == ISD::NON_EXTLOAD) { in LegalizeLoadOps()
737 TLI.getLoadExtAction(ExtType, Node->getValueType(0), MVT::i1) == in LegalizeLoadOps()
749 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
757 if (ExtType == ISD::SEXTLOAD) in LegalizeLoadOps()
762 else if (ExtType == ISD::ZEXTLOAD || NVT == Result.getValueType()) in LegalizeLoadOps()
798 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps()
819 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps()
848 switch (TLI.getLoadExtAction(ExtType, Node->getValueType(0), in LegalizeLoadOps()
882 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) { in LegalizeLoadOps()
[all …]
H A DLegalizeIntegerTypes.cpp685 ISD::LoadExtType ExtType = in PromoteIntRes_LOAD() local
688 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_LOAD()
718 ISD::LoadExtType ExtType = N->getExtensionType(); in PromoteIntRes_MGATHER() local
719 if (ExtType == ISD::NON_EXTLOAD) in PromoteIntRes_MGATHER()
720 ExtType = ISD::EXTLOAD; in PromoteIntRes_MGATHER()
728 ExtType); in PromoteIntRes_MGATHER()
3183 ISD::LoadExtType ExtType = N->getExtensionType(); in ExpandIntRes_LOAD() local
3193 Lo = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), MemVT, in ExpandIntRes_LOAD()
3199 if (ExtType == ISD::SEXTLOAD) { in ExpandIntRes_LOAD()
3206 } else if (ExtType == ISD::ZEXTLOAD) { in ExpandIntRes_LOAD()
[all …]
H A DSelectionDAG.cpp438 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) { in getExtForLoadExtType() argument
439 switch (ExtType) { in getExtForLoadExtType()
4180 unsigned ExtType = LD->getExtensionType(); in ComputeNumSignBits() local
4181 switch (ExtType) { in ComputeNumSignBits()
7268 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad() argument
7289 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); in getLoad()
7292 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad() argument
7297 ExtType = ISD::NON_EXTLOAD; in getLoad()
7298 } else if (ExtType == ISD::NON_EXTLOAD) { in getLoad()
7323 dl.getIROrder(), VTs, AM, ExtType, MemVT, MMO)); in getLoad()
[all …]
H A DDAGCombiner.cpp680 bool isLegalNarrowLdSt(LSBaseSDNode *LDSTN, ISD::LoadExtType ExtType,
795 ISD::NodeType ExtType);
1213 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) ? ISD::EXTLOAD in PromoteOperand() local
1216 return DAG.getExtLoad(ExtType, DL, PVT, in PromoteOperand()
1450 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) ? ISD::EXTLOAD in PromoteLoad() local
1452 SDValue NewLD = DAG.getExtLoad(ExtType, DL, PVT, in PromoteLoad()
5229 ISD::LoadExtType ExtType, EVT &MemVT, in isLegalNarrowLdSt() argument
5282 !TLI.isLoadExtLegal(ExtType, Load->getValueType(0), MemVT)) in isLegalNarrowLdSt()
5300 if (!TLI.shouldReduceLoadWidth(Load, ExtType, MemVT)) in isLegalNarrowLdSt()
10397 ISD::NodeType ExtType) { in ExtendSetCCUses() argument
[all …]
H A DLegalizeVectorOps.cpp259 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeOp() local
260 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) { in LegalizeOp()
/netbsd-src/external/apache2/llvm/dist/clang/lib/Serialization/
H A DASTCommon.cpp215 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in TypeIdxFromBuiltin() argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h179 ISD::LoadExtType ExtType,
H A DR600ISelLowering.cpp1299 ISD::LoadExtType ExtType = Load->getExtensionType(); in lowerPrivateExtLoad() local
1336 if (ExtType == ISD::SEXTLOAD) { // ... ones. in lowerPrivateExtLoad()
1355 ISD::LoadExtType ExtType = LoadNode->getExtensionType(); in LowerLOAD() local
1358 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
/netbsd-src/external/apache2/llvm/dist/clang/lib/AST/
H A DTypeLoc.cpp395 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getWrittenTypeSpec() argument
H A DNSAPI.cpp466 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getNSNumberFactoryMethodKind() argument
/netbsd-src/external/apache2/llvm/dist/clang/include/clang/Serialization/
H A DASTBitCodes.h1072 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) PREDEF_TYPE_##Id##_ID, argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrInfo.td1168 ISD::LoadExtType ExtType = LD->getExtensionType();
1169 return ExtType == ISD::NON_EXTLOAD || ExtType == ISD::EXTLOAD ||
1170 ExtType == ISD::ZEXTLOAD;
1177 ISD::LoadExtType ExtType = LD->getExtensionType();
1178 if (ExtType == ISD::NON_EXTLOAD)
1180 if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
1187 ISD::LoadExtType ExtType = LD->getExtensionType();
1188 if (ExtType == ISD::NON_EXTLOAD)
1190 if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
1242 ISD::LoadExtType ExtType = LD->getExtensionType();
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp254 enum ExtType { enum
264 using TypeIsSExt = PointerIntPair<Type *, 2, ExtType>;
4024 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in addPromotedInst()
4047 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in getOrigType()
6995 Instruction::CastOps ExtType = Instruction::ZExt; in optimizeSwitchInst() local
6998 ExtType = Instruction::SExt; in optimizeSwitchInst()
7000 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType); in optimizeSwitchInst()
7006 APInt WideConst = (ExtType == Instruction::ZExt) ? in optimizeSwitchInst()
/netbsd-src/external/apache2/llvm/dist/clang/include/clang/AST/
H A DType.h2117 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \
2494 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) Id,
6897 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \
6904 #define INTEL_SUBGROUP_AVC_TYPE(ExtType, Id) \
6912 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) is##Id##Type() ||
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp89 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::InvalidShiftExtend; member in __anona45ed14d0111::AArch64FastISel::Address
104 void setExtendType(AArch64_AM::ShiftExtendType E) { ExtType = E; } in setExtendType()
105 AArch64_AM::ShiftExtendType getExtendType() const { return ExtType; } in getExtendType()
215 unsigned RHSReg, AArch64_AM::ShiftExtendType ExtType,
1406 AArch64_AM::ShiftExtendType ExtType, in emitAddSub_rx() argument
1444 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()

123