/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.h | 124 unsigned ExtOpcode); 141 unsigned ExtOpcode);
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 1255 unsigned OpIdx, unsigned ExtOpcode) { in widenScalarSrc() argument 1257 auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO}); in widenScalarSrc() 1278 unsigned OpIdx, unsigned ExtOpcode) { in narrowScalarDst() argument 1282 MIRBuilder.buildInstr(ExtOpcode, {MO}, {DstTrunc}); in narrowScalarDst() 1718 unsigned ExtOpcode; in widenScalarAddSubOverflow() local 1725 ExtOpcode = TargetOpcode::G_SEXT; in widenScalarAddSubOverflow() 1729 ExtOpcode = TargetOpcode::G_SEXT; in widenScalarAddSubOverflow() 1733 ExtOpcode = TargetOpcode::G_ZEXT; in widenScalarAddSubOverflow() 1737 ExtOpcode = TargetOpcode::G_ZEXT; in widenScalarAddSubOverflow() 1741 ExtOpcode = TargetOpcode::G_SEXT; in widenScalarAddSubOverflow() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSelect.cpp | 1923 auto ExtOpcode = ExtInst->getOpcode(); in foldSelectExtConst() local 1924 if (ExtOpcode != Instruction::ZExt && ExtOpcode != Instruction::SExt) in foldSelectExtConst() 1941 Constant *ExtC = ConstantExpr::getCast(ExtOpcode, TruncC, SelType); in foldSelectExtConst() 1950 return CastInst::Create(Instruction::CastOps(ExtOpcode), NewSel, SelType); in foldSelectExtConst() 1960 Constant *AllOnesOrOne = ConstantExpr::getCast(ExtOpcode, One, SelType); in foldSelectExtConst()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPURegisterBankInfo.cpp | 1610 unpackV2S16ToS32(MachineIRBuilder &B, Register Src, unsigned ExtOpcode) { in unpackV2S16ToS32() argument 1614 if (ExtOpcode == TargetOpcode::G_SEXT) { in unpackV2S16ToS32() 1621 if (ExtOpcode == TargetOpcode::G_ZEXT) { in unpackV2S16ToS32() 1626 assert(ExtOpcode == TargetOpcode::G_ANYEXT); in unpackV2S16ToS32()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 3501 unsigned ExtOpcode) { in addRequiredExtensionForVectorMULL() argument 3512 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in addRequiredExtensionForVectorMULL() 11910 unsigned ExtOpcode = Op0.getOpcode(); in performVecReduceAddCombine() local 11913 if (ExtOpcode == ISD::MUL) { in performVecReduceAddCombine() 11919 ExtOpcode = A.getOpcode(); in performVecReduceAddCombine() 11921 if (ExtOpcode != ISD::ZERO_EXTEND && ExtOpcode != ISD::SIGN_EXTEND) in performVecReduceAddCombine() 11939 (ExtOpcode == ISD::ZERO_EXTEND) ? AArch64ISD::UDOT : AArch64ISD::SDOT; in performVecReduceAddCombine()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 9926 auto ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in visitVSELECT() local 9927 SDValue WideLHS = DAG.getNode(ExtOpcode, DL, WideVT, LHS); in visitVSELECT() 9928 SDValue WideRHS = DAG.getNode(ExtOpcode, DL, WideVT, RHS); in visitVSELECT() 10178 static bool isCompatibleLoad(SDValue N, unsigned ExtOpcode) { in isCompatibleLoad() argument 10192 if ((LoadExt == ISD::SEXTLOAD && ExtOpcode != ISD::SIGN_EXTEND) || in isCompatibleLoad() 10193 (LoadExt == ISD::ZEXTLOAD && ExtOpcode != ISD::ZERO_EXTEND)) in isCompatibleLoad()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 6355 unsigned ExtOpcode = in combineINT_TO_FP() local 6357 SDValue ExtOp = DAG.getNode(ExtOpcode, SDLoc(N), ExtVT, Op); in combineINT_TO_FP()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 2207 unsigned ExtOpcode = Op.getOpcode() == ISD::UINT_TO_FP in LowerOperation() local 2210 SDValue Ext = DAG.getNode(ExtOpcode, DL, IVecVT, Src); in LowerOperation()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 8868 unsigned ExtOpcode) { in AddRequiredExtensionForVMULL() argument 8879 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in AddRequiredExtensionForVMULL()
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