Searched refs:ExtB (Results 1 – 4 of 4) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVExtract.cpp | 69 MachineBasicBlock &ExtB = *ExtI->getParent(); in genElemLoad() local
83 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L2_loadri_io), ElemR) in genElemLoad()
91 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::A2_andir), IdxR) in genElemLoad()
94 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L4_loadri_rr), ElemR) in genElemLoad()
168 MachineBasicBlock &ExtB = *ExtI->getParent(); in runOnMachineFunction() local
170 Register BaseR = EmitAddr(ExtB, ExtI, ExtI->getDebugLoc(), FI, in runOnMachineFunction()
176 ExtB.erase(ExtI); in runOnMachineFunction()
|
| H A D | HexagonISelLoweringHVX.cpp | 843 SDValue ExtB = extractHvxElementReg(ByteVec, IdxV, dl, MVT::i32, DAG); in extractHvxElementPred() local
845 return getInstr(Hexagon::C2_cmpgtui, dl, MVT::i1, {ExtB, Zero}, DAG); in extractHvxElementPred()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1257 auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO}); in widenScalarSrc() local
1258 MO.setReg(ExtB.getReg(0)); in widenScalarSrc()
1264 auto ExtB = MIRBuilder.buildTrunc(NarrowTy, MO); in narrowScalarSrc() local
1265 MO.setReg(ExtB.getReg(0)); in narrowScalarSrc()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 15633 SDValue ExtB = Mul->getOperand(1); in PerformVECREDUCE_ADDCombine() local
15634 if (ExtA->getOpcode() != ExtendCode && ExtB->getOpcode() != ExtendCode) in PerformVECREDUCE_ADDCombine()
15637 B = ExtB->getOperand(0); in PerformVECREDUCE_ADDCombine()
15667 SDValue ExtB = Mul->getOperand(1); in PerformVECREDUCE_ADDCombine() local
15668 if (ExtA->getOpcode() != ExtendCode && ExtB->getOpcode() != ExtendCode) in PerformVECREDUCE_ADDCombine()
15671 B = ExtB->getOperand(0); in PerformVECREDUCE_ADDCombine()
|