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Searched refs:EFFECTIVE_L2_QUEUE_SIZE (Results 1 – 15 of 15) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_rv770.c917 EFFECTIVE_L2_QUEUE_SIZE(7)); in rv770_pcie_gart_enable()
963 EFFECTIVE_L2_QUEUE_SIZE(7)); in rv770_pcie_gart_disable()
994 EFFECTIVE_L2_QUEUE_SIZE(7)); in rv770_agp_enable()
H A Drv770d.h648 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) macro
H A Dnid.h111 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) macro
H A Dradeon_ni.c1305 EFFECTIVE_L2_QUEUE_SIZE(7) | in cayman_pcie_gart_enable()
1384 EFFECTIVE_L2_QUEUE_SIZE(7) | in cayman_pcie_gart_disable()
H A Dsid.h378 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) macro
H A Dcikd.h496 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) macro
H A Dradeon_r600.c1178 EFFECTIVE_L2_QUEUE_SIZE(7)); in r600_pcie_gart_enable()
1231 EFFECTIVE_L2_QUEUE_SIZE(7)); in r600_pcie_gart_disable()
1270 EFFECTIVE_L2_QUEUE_SIZE(7)); in r600_agp_enable()
H A Dradeon_evergreen.c2417 EFFECTIVE_L2_QUEUE_SIZE(7)); in evergreen_pcie_gart_enable()
2470 EFFECTIVE_L2_QUEUE_SIZE(7)); in evergreen_pcie_gart_disable()
2500 EFFECTIVE_L2_QUEUE_SIZE(7)); in evergreen_agp_enable()
H A Devergreend.h1156 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) macro
H A Dr600d.h593 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 13) macro
H A Dradeon_si.c4316 EFFECTIVE_L2_QUEUE_SIZE(7) | in si_pcie_gart_enable()
4402 EFFECTIVE_L2_QUEUE_SIZE(7) | in si_pcie_gart_disable()
H A Dradeon_cik.c5470 EFFECTIVE_L2_QUEUE_SIZE(7) | in cik_pcie_gart_enable()
5587 EFFECTIVE_L2_QUEUE_SIZE(7) | in cik_pcie_gart_disable()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gmc_v7_0.c652 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, EFFECTIVE_L2_QUEUE_SIZE, 7); in gmc_v7_0_gart_enable()
H A Dsid.h380 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) macro
H A Damdgpu_gmc_v8_0.c873 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, EFFECTIVE_L2_QUEUE_SIZE, 7); in gmc_v8_0_gart_enable()