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Searched refs:Dis (Results 1 – 20 of 20) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1672 const MCDisassembler *Dis);
1802 const MCDisassembler *Dis) { in tryAddingSymbolicOperand() argument
1803 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch, in tryAddingSymbolicOperand()
1816 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); in tryAddingPcLoadReferenceComment() local
1817 Dis->tryAddingPcLoadReferenceComment(Value, Address); in tryAddingPcLoadReferenceComment()
1884 const MCDisassembler *Dis) { in translateImmediate() argument
1971 mcInst, Dis)) in translateImmediate()
2027 const MCDisassembler *Dis, in translateRMMemory() argument
2112 insn.displacement + pcrel, Dis); in translateRMMemory()
2174 insn.displacementSize, mcInst, Dis)) in translateRMMemory()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp184 const RISCVDisassembler *Dis = in DecodeVRM2RegisterClass() local
186 const MCRegisterInfo *RI = Dis->getContext().getRegisterInfo(); in DecodeVRM2RegisterClass()
204 const RISCVDisassembler *Dis = in DecodeVRM4RegisterClass() local
206 const MCRegisterInfo *RI = Dis->getContext().getRegisterInfo(); in DecodeVRM4RegisterClass()
224 const RISCVDisassembler *Dis = in DecodeVRM8RegisterClass() local
226 const MCRegisterInfo *RI = Dis->getContext().getRegisterInfo(); in DecodeVRM8RegisterClass()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp846 const AArch64Disassembler *Dis = in DecodePCRelLabel19() local
853 if (!Dis->tryAddingSymbolicOperand(Inst, ImmVal * 4, Addr, in DecodePCRelLabel19()
1078 const AArch64Disassembler *Dis = in DecodeUnsignedLdStInstruction() local
1128 if (!Dis->tryAddingSymbolicOperand(Inst, offset, Addr, Fail, 0, 4)) in DecodeUnsignedLdStInstruction()
1731 const AArch64Disassembler *Dis = in DecodeAdrInstruction() local
1739 if (!Dis->tryAddingSymbolicOperand(Inst, imm, Addr, Fail, 0, 4)) in DecodeAdrInstruction()
1755 const AArch64Disassembler *Dis = in DecodeAddSubImmShift() local
1775 if (!Dis->tryAddingSymbolicOperand(Inst, Imm, Addr, Fail, 0, 4)) in DecodeAddSubImmShift()
1785 const AArch64Disassembler *Dis = in DecodeUnconditionalBranch() local
1792 if (!Dis->tryAddingSymbolicOperand(Inst, imm * 4, Addr, true, 0, 4)) in DecodeUnconditionalBranch()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp214 const MCDisassembler *Dis = static_cast<const MCDisassembler *>(Decoder); in tryAddingSymbolicOperand() local
215 return Dis->tryAddingSymbolicOperand(MI, Value, Address, IsBranch, Offset, in tryAddingSymbolicOperand()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp77 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); in tryAddingSymbolicOperand() local
78 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch, in tryAddingSymbolicOperand()
/netbsd-src/external/bsd/openldap/dist/doc/drafts/
H A Ddraft-chu-ldap-xordered-xx.txt499 olcSuffix: {0}ou=Dis,o=example.com
528 olcSuffix: {0}ou=Dis,o=example.com
533 olcSuffix: {1}ou=Dis,o=example.com
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp505 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); in tryAddingSymbolicOperand() local
506 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch, in tryAddingSymbolicOperand()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/RuntimeDyld/
H A DRuntimeDyldChecker.cpp668 MCDisassembler *Dis = Checker.Disassembler; in decodeInst() local
673 Dis->getInstruction(Inst, Size, SymbolBytes, 0, nulls()); in decodeInst()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp70 const XCoreDisassembler *Dis = static_cast<const XCoreDisassembler*>(D); in getReg() local
71 const MCRegisterInfo *RegInfo = Dis->getContext().getRegisterInfo(); in getReg()
/netbsd-src/external/bsd/file/dist/magic/magdir/
H A Dspectrum152 0 string MV\ -\ CPC\ format\ Dis Amstrad/Spectrum DU54 .DSK data
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp706 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); in tryAddingSymbolicOperand() local
708 return Dis->tryAddingSymbolicOperand(MI, (uint32_t)Value, Address, isBranch, in tryAddingSymbolicOperand()
723 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); in tryAddingPcLoadReferenceComment() local
724 Dis->tryAddingPcLoadReferenceComment(Value, Address); in tryAddingPcLoadReferenceComment()
2332 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); in DecodeHINTInstruction() local
2333 const FeatureBitset &FeatureBits = Dis->getSubtargetInfo().getFeatureBits(); in DecodeHINTInstruction()
2545 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); in DecodeSETPANInstruction() local
2546 const FeatureBitset &FeatureBits = Dis->getSubtargetInfo().getFeatureBits(); in DecodeSETPANInstruction()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp581 const MipsDisassembler *Dis = static_cast<const MipsDisassembler*>(D); in getReg() local
582 const MCRegisterInfo *RegInfo = Dis->getContext().getRegisterInfo(); in getReg()
/netbsd-src/external/gpl3/binutils.old/dist/binutils/
H A DNEWS829 * Dis-assembler interface changed to allow sharing with gdb.
/netbsd-src/external/gpl3/binutils/dist/binutils/
H A DNEWS926 * Dis-assembler interface changed to allow sharing with gdb.
/netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/
H A DCGCall.cpp4266 DisableDebugLocationUpdates Dis(*this, E); in EmitCallArg() local
/netbsd-src/external/gpl3/gcc.old/dist/gcc/doc/
H A Dinvoke.texi21994 (Dis/En)able data speculative scheduling before reload.
22003 (En/Dis)able data speculative scheduling after reload.
22012 (Dis/En)able control speculative scheduling. This feature is
22022 (En/Dis)able speculative scheduling of the instructions that
22031 (En/Dis)able speculative scheduling of the instructions that
22040 (En/Dis)able speculative scheduling of the instructions that
H A Dgcc.info20490 (Dis/En)able data speculative scheduling before reload. This
20497 (En/Dis)able data speculative scheduling after reload. This
20504 (Dis/En)able control speculative scheduling. This feature is
20512 (En/Dis)able speculative scheduling of the instructions that are
20519 (En/Dis)able speculative scheduling of the instructions that are
20526 (En/Dis)able speculative scheduling of the instructions that are
/netbsd-src/external/gpl3/gcc/dist/gcc/doc/
H A Dinvoke.texi24308 (Dis/En)able data speculative scheduling before reload.
24317 (En/Dis)able data speculative scheduling after reload.
24326 (Dis/En)able control speculative scheduling. This feature is
24336 (En/Dis)able speculative scheduling of the instructions that
24345 (En/Dis)able speculative scheduling of the instructions that
24354 (En/Dis)able speculative scheduling of the instructions that
H A Dgcc.info22597 (Dis/En)able data speculative scheduling before reload. This
22604 (En/Dis)able data speculative scheduling after reload. This
22611 (Dis/En)able control speculative scheduling. This feature is
22619 (En/Dis)able speculative scheduling of the instructions that are
22626 (En/Dis)able speculative scheduling of the instructions that are
22633 (En/Dis)able speculative scheduling of the instructions that are
/netbsd-src/external/gpl2/xcvs/dist/doc/i18n/pt_BR/
H A Dcvs.texinfo1817 @comment Disclaimer Dis*claim"er, n.