| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 108 MachineInstr *DefInst = I->getParent(); in checkADDrr() local
109 unsigned Opcode = DefInst->getOpcode(); in checkADDrr()
123 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr()
133 const MachineOperand &Opnd = DefInst->getOperand(0); in checkADDrr()
138 BuildMI(*DefInst->getParent(), *DefInst, DefInst->getDebugLoc(), TII->get(COREOp)) in checkADDrr()
139 .add(DefInst->getOperand(0)).addImm(Opcode).add(*BaseOp) in checkADDrr()
141 DefInst->eraseFromParent(); in checkADDrr()
273 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD() local
274 if (!DefInst) in removeLD()
277 if (DefInst->getOpcode() != BPF::LD_imm64) in removeLD()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 558 Instruction *DefInst = nullptr; member
566 : DefInst(Inst), Generation(Generation), MatchingId(MatchingId), in LoadValue()
1107 if (InVal.DefInst == nullptr) in getMatchingValue()
1122 Instruction *Matching = MemInstMatching ? MemInst.get() : InVal.DefInst; in getMatchingValue()
1123 Instruction *Other = MemInstMatching ? InVal.DefInst : MemInst.get(); in getMatchingValue()
1130 if (MemInst.isStore() && InVal.DefInst != Result) in getMatchingValue()
1139 if (!isNonTargetIntrinsicMatch(cast<IntrinsicInst>(InVal.DefInst), in getMatchingValue()
1145 !isSameMemGeneration(InVal.Generation, CurrentGeneration, InVal.DefInst, in getMatchingValue()
1410 << " to: " << *InVal.DefInst << '\n'); in processNode()
1491 if (InVal.DefInst && in processNode()
[all …]
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| H A D | DeadStoreElimination.cpp | 1107 bool isCompleteOverwrite(const MemoryLocation &DefLoc, Instruction *DefInst, in isCompleteOverwrite()
1121 return isOverwrite(UseInst, DefInst, *CC, DefLoc, DepWriteOffset, in isCompleteOverwrite()
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| H A D | NewGVN.cpp | 3928 auto *DefInst = dyn_cast_or_null<Instruction>(Def); in eliminateInstructions() local
3929 if (DefInst && AllTempInstructions.count(DefInst)) { in eliminateInstructions()
3930 auto *PN = cast<PHINode>(DefInst); in eliminateInstructions()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 251 MachineBasicBlock::iterator DefInst; in addLinkerOpt() member
313 MachineBasicBlock::iterator BBI = Pair->DefInst; in addLinkerOpt()
336 Pair->DefInst->addOperand(ImplDef); in addLinkerOpt()
344 Pair->DefInst->addOperand(*MF, PCRelLabel); in addLinkerOpt()
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| H A D | PPCBranchCoalescing.cpp | 467 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg()); in canMoveToEnd() local
468 if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) { in canMoveToEnd()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 416 MachineInstr *DefInst = LastDef[Reg]; in findPotentialNewifiableTFRs() local
417 if (!DefInst) in findPotentialNewifiableTFRs()
419 if (!isCombinableInstType(*DefInst, TII, ShouldCombineAggressively)) in findPotentialNewifiableTFRs()
424 MachineBasicBlock::iterator It(DefInst); in findPotentialNewifiableTFRs()
435 PotentiallyNewifiableTFR.insert(DefInst); in findPotentialNewifiableTFRs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | MemorySSA.cpp | 272 Instruction *DefInst = MD->getMemoryInst(); in instructionClobbersQuery() local
273 assert(DefInst && "Defining instruction not actually an instruction"); in instructionClobbersQuery()
276 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(DefInst)) { in instructionClobbersQuery()
301 ModRefInfo I = AA.getModRefInfo(DefInst, CB); in instructionClobbersQuery()
306 if (auto *DefLoad = dyn_cast<LoadInst>(DefInst)) in instructionClobbersQuery()
311 ModRefInfo I = AA.getModRefInfo(DefInst, UseLoc); in instructionClobbersQuery()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIPeepholeSDWA.cpp | 504 const MachineInstr *DefInst = Def.getParent(); in foldToImm() local
505 if (!TII->isFoldableCopy(*DefInst)) in foldToImm()
508 const MachineOperand &Copied = DefInst->getOperand(1); in foldToImm()
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| H A D | SIInstrInfo.cpp | 7627 auto *DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef() local
7628 while (auto *MI = DefInst) { in getVRegSubRegDef()
7629 DefInst = nullptr; in getVRegSubRegDef()
7638 DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef()
7646 DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef()
7649 if (!DefInst) in getVRegSubRegDef()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | RegAllocFast.cpp | 392 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveIn() local
393 if (DefInst.getParent() != MBB || ++C >= Limit) { in mayLiveIn()
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