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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5802 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x0000001a macro
H A Ddce_8_0_sh_mask.h7960 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x1a macro
H A Ddce_10_0_sh_mask.h6988 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x1a macro
H A Ddce_11_0_sh_mask.h6890 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x1a macro
H A Ddce_11_2_sh_mask.h7962 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x1a macro
H A Ddce_12_0_sh_mask.h4861 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT … macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h2333 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT … macro
H A Ddcn_1_0_sh_mask.h3827 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h2601 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT … macro