Searched refs:DKL_PLL_TDC_SSC_STEP_SIZE_MASK (Results 1 – 2 of 2) sorted by relevance
3260 hw_state->mg_pll_tdc_coldst_bias &= (DKL_PLL_TDC_SSC_STEP_SIZE_MASK | in dkl_pll_get_hw_state()3464 val &= ~(DKL_PLL_TDC_SSC_STEP_SIZE_MASK | in dkl_pll_write()
10327 #define DKL_PLL_TDC_SSC_STEP_SIZE_MASK (0xFF << 8) macro