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Searched refs:DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_vega10_powertune.c565 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK, DIDT_T…
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h29354 #define DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_9_2_1_sh_mask.h30852 #define DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_9_1_sh_mask.h30566 #define DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_10_1_0_sh_mask.h43621 #define DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK … macro