Home
last modified time | relevance | path

Searched refs:DC_PERFMON0_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h1065 #define DC_PERFMON0_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_1_0_sh_mask.h2619 #define DC_PERFMON0_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h1265 #define DC_PERFMON0_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h92 #define DC_PERFMON0_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro