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Searched refs:D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h2535 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x00000100L macro
H A Ddce_8_0_sh_mask.h11047 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x100 macro
H A Ddce_10_0_sh_mask.h11431 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x100 macro
H A Ddce_11_0_sh_mask.h11243 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x100 macro
H A Ddce_11_2_sh_mask.h12497 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x100 macro
H A Ddce_12_0_sh_mask.h2288 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h235 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
H A Ddcn_1_0_sh_mask.h1734 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h338 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro