| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 84 bool emitPrefixImpl(unsigned &CurOp, const MCInst &MI, 261 unsigned CurOp = X86II::getOperandBias(Desc); in isPCRel32Branch() local 262 const MCOperand &Op = MI.getOperand(CurOp); in isPCRel32Branch() 654 bool X86MCCodeEmitter::emitPrefixImpl(unsigned &CurOp, const MCInst &MI, in emitPrefixImpl() argument 662 MemoryOperand += CurOp; in emitPrefixImpl() 722 CurOp += 3; // Consume operands. in emitPrefixImpl() 734 CurOp += 2; // Consume operands. in emitPrefixImpl() 743 ++CurOp; // Consume operand. in emitPrefixImpl() 885 unsigned CurOp = X86II::getOperandBias(Desc); in emitVEXOpcodePrefix() local 909 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix() [all …]
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| H A D | X86IntelInstPrinter.cpp | 139 unsigned CurOp = 0; in printVecCompareInstr() local 140 printOperand(MI, CurOp++, OS); in printVecCompareInstr() 145 printOperand(MI, CurOp++, OS); in printVecCompareInstr() 149 printOperand(MI, CurOp++, OS); in printVecCompareInstr() 157 printqwordmem(MI, CurOp++, OS); in printVecCompareInstr() 159 printdwordmem(MI, CurOp++, OS); in printVecCompareInstr() 172 printdwordmem(MI, CurOp++, OS); in printVecCompareInstr() 174 printqwordmem(MI, CurOp++, OS); in printVecCompareInstr() 176 printzmmwordmem(MI, CurOp++, OS); in printVecCompareInstr() 178 printymmwordmem(MI, CurOp++, OS); in printVecCompareInstr() [all …]
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| H A D | X86ATTInstPrinter.cpp | 160 unsigned CurOp = (Desc.TSFlags & X86II::EVEX_K) ? 3 : 2; in printVecCompareInstr() local 167 printqwordmem(MI, CurOp--, OS); in printVecCompareInstr() 169 printdwordmem(MI, CurOp--, OS); in printVecCompareInstr() 182 printdwordmem(MI, CurOp--, OS); in printVecCompareInstr() 184 printqwordmem(MI, CurOp--, OS); in printVecCompareInstr() 186 printzmmwordmem(MI, CurOp--, OS); in printVecCompareInstr() 188 printymmwordmem(MI, CurOp--, OS); in printVecCompareInstr() 190 printxmmwordmem(MI, CurOp--, OS); in printVecCompareInstr() 195 printOperand(MI, CurOp--, OS); in printVecCompareInstr() 199 printOperand(MI, CurOp--, OS); in printVecCompareInstr() [all …]
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| H A D | X86AsmBackend.cpp | 345 unsigned CurOp = X86II::getOperandBias(Desc); in isRIPRelative() local 349 unsigned BaseRegNum = MemoryOperand + CurOp + X86::AddrBaseReg; in isRIPRelative()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 128 SDNode *Node, unsigned SEW, const SDLoc &DL, unsigned CurOp, bool IsMasked, in addVectorLoadStoreOperands() argument 134 SelectBaseAddr(Node->getOperand(CurOp++), Base); in addVectorLoadStoreOperands() 138 Operands.push_back(Node->getOperand(CurOp++)); // Index. in addVectorLoadStoreOperands() 145 SDValue Mask = Node->getOperand(CurOp++); in addVectorLoadStoreOperands() 151 selectVLOp(Node->getOperand(CurOp++), VL); in addVectorLoadStoreOperands() 171 unsigned CurOp = 2; in selectVLSEG() local 174 SmallVector<SDValue, 8> Regs(Node->op_begin() + CurOp, in selectVLSEG() 175 Node->op_begin() + CurOp + NF); in selectVLSEG() 178 CurOp += NF; in selectVLSEG() 181 addVectorLoadStoreOperands(Node, ScalarSize, DL, CurOp, IsMasked, IsStrided, in selectVLSEG() [all …]
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| H A D | RISCVISelDAGToDAG.h | 76 const SDLoc &DL, unsigned CurOp,
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | RISCVCompressInstEmitter.cpp | 629 StringRef CurOp; in emitCompressInstEmitter() local 655 CurOp = Source.TheDef->getName(); in emitCompressInstEmitter() 657 if (CurOp != PrevOp) { in emitCompressInstEmitter() 660 CaseStream.indent(4) << "case " + Namespace + "::" + CurOp + ": {\n"; in emitCompressInstEmitter() 816 PrevOp = CurOp; in emitCompressInstEmitter() 820 Func.indent(4) << "} // case " << CurOp << "\n"; in emitCompressInstEmitter()
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| H A D | DAGISelMatcherGen.cpp | 597 unsigned CurOp = NextRecordedOperandNo; in EmitMatcherCode() local 599 NamedComplexPatternOperands[N->getChild(i)->getName()] = CurOp + 1; in EmitMatcherCode() 600 CurOp += N->getChild(i)->getNumMIResults(CGP); in EmitMatcherCode()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGDecl.cpp | 1038 llvm::Constant *CurOp; in constStructWithPadding() local 1040 CurOp = llvm::Constant::getNullValue(STy->getElementType(i)); in constStructWithPadding() 1042 CurOp = cast<llvm::Constant>(constant->getAggregateElement(i)); in constStructWithPadding() 1043 auto *NewOp = constWithPadding(CGM, isPattern, CurOp); in constStructWithPadding() 1044 if (CurOp != NewOp) in constStructWithPadding() 1047 SizeSoFar = CurOff + DL.getTypeAllocSize(CurOp->getType()); in constStructWithPadding()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGISel.cpp | 2109 unsigned CurOp = InlineAsm::Op_FirstOperand; in SelectInlineAsmMemoryOperands() local 2110 Flags = cast<ConstantSDNode>(InOps[CurOp])->getZExtValue(); in SelectInlineAsmMemoryOperands() 2112 CurOp += InlineAsm::getNumOperandRegisters(Flags)+1; in SelectInlineAsmMemoryOperands() 2113 Flags = cast<ConstantSDNode>(InOps[CurOp])->getZExtValue(); in SelectInlineAsmMemoryOperands()
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| H A D | SelectionDAGBuilder.cpp | 8312 unsigned CurOp = InlineAsm::Op_FirstOperand; in findMatchingInlineAsmOperand() local 8316 cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue(); in findMatchingInlineAsmOperand() 8321 CurOp += InlineAsm::getNumOperandRegisters(OpFlag) + 1; in findMatchingInlineAsmOperand() 8323 return CurOp; in findMatchingInlineAsmOperand() 8599 auto CurOp = findMatchingInlineAsmOperand(OpInfo.getMatchedOperand(), in visitInlineAsm() local 8602 cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue(); in visitInlineAsm() 8614 MVT RegVT = AsmNodeOperands[CurOp+1].getSimpleValueType(); in visitInlineAsm() 8651 AsmNodeOperands.push_back(AsmNodeOperands[CurOp+1]); in visitInlineAsm()
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| /netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
| H A D | WritingAnLLVMBackend.rst | 1890 MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(CurOp++).getReg())); 1892 if (CurOp != NumOps) { 1893 const MachineOperand &MO1 = MI.getOperand(CurOp++);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 33348 unsigned CurOp = 0; in emitEHSjLjSetJmp() local 33350 DstReg = MI.getOperand(CurOp++).getReg(); in emitEHSjLjSetJmp() 33357 MemOpndSlot = CurOp; in emitEHSjLjSetJmp() 34423 unsigned CurOp = 0; in EmitInstrWithCustomInserter() local 34425 MIB.addReg(TMMImmToTMMReg(MI.getOperand(CurOp++).getImm()), in EmitInstrWithCustomInserter() 34428 MIB.add(MI.getOperand(CurOp++)); // base in EmitInstrWithCustomInserter() 34429 MIB.add(MI.getOperand(CurOp++)); // scale in EmitInstrWithCustomInserter() 34430 MIB.add(MI.getOperand(CurOp++)); // index -- stride in EmitInstrWithCustomInserter() 34431 MIB.add(MI.getOperand(CurOp++)); // displacement in EmitInstrWithCustomInserter() 34432 MIB.add(MI.getOperand(CurOp++)); // segment in EmitInstrWithCustomInserter() [all …]
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