| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 99 Register &SrcReg2, int &CmpMask,
106 Register SrcReg2, int CmpMask, int CmpValue,
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| H A D | LanaiInstrInfo.cpp | 178 Register &SrcReg2, int &CmpMask, in analyzeCompare() argument
187 CmpMask = ~0; in analyzeCompare()
193 CmpMask = ~0; in analyzeCompare()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 230 Register &SrcReg2, int &CmpMask,
235 Register SrcReg2, int CmpMask, int CmpValue,
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| H A D | AArch64InstrInfo.cpp | 1115 Register &SrcReg2, int &CmpMask, in analyzeCompare() argument
1130 CmpMask = ~0; in analyzeCompare()
1148 CmpMask = ~0; in analyzeCompare()
1157 CmpMask = ~0; in analyzeCompare()
1167 CmpMask = ~0; in analyzeCompare()
1436 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int CmpMask, in optimizeCompareInstr() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 509 Register &SrcReg2, int &CmpMask,
516 Register SrcReg2, int CmpMask, int CmpValue,
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| H A D | X86InstrInfo.cpp | 3855 Register &SrcReg2, int &CmpMask, in analyzeCompare() argument
3869 CmpMask = ~0; in analyzeCompare()
3872 CmpMask = CmpValue = 0; in analyzeCompare()
3882 CmpMask = 0; in analyzeCompare()
3891 CmpMask = 0; in analyzeCompare()
3904 CmpMask = ~0; in analyzeCompare()
3907 CmpMask = CmpValue = 0; in analyzeCompare()
3916 CmpMask = 0; in analyzeCompare()
3928 CmpMask = ~0; in analyzeCompare()
4140 Register SrcReg2, int CmpMask, in optimizeCompareInstr() argument
[all …]
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| H A D | X86ISelLowering.cpp | 25450 SDValue CmpMask = getScalarMaskingNode(Cmp, Mask, SDValue(), in LowerINTRINSIC_WO_CHAIN() local
25456 CmpMask, DAG.getIntPtrConstant(0, dl)); in LowerINTRINSIC_WO_CHAIN()
42448 unsigned CmpMask = IsAnyOf ? 0 : ((1 << BCNumElts) - 1); in combineSetCCMOVMSK() local
42451 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
42502 unsigned CmpMask = IsAnyOf ? 0 : 0xFFFFFFFF; in combineSetCCMOVMSK() local
42509 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 471 int CmpImm = 0, CmpMask = 0; in findInductionRegister() local
473 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm); in findInductionRegister()
1457 int CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local
1459 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 292 Register &SrcReg2, int &CmpMask,
300 Register SrcReg2, int CmpMask, int CmpValue,
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| H A D | ARMBaseInstrInfo.cpp | 2773 Register &SrcReg2, int &CmpMask, in analyzeCompare() argument
2782 CmpMask = ~0; in analyzeCompare()
2790 CmpMask = ~0; in analyzeCompare()
2797 CmpMask = MI.getOperand(1).getImm(); in analyzeCompare()
2810 int CmpMask, bool CommonUse) { in isSuitableForMask() argument
2814 if (CmpMask != MI->getOperand(2).getImm()) in isSuitableForMask()
2980 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int CmpMask, in optimizeCompareInstr() argument
2987 if (CmpMask != ~0) { in optimizeCompareInstr()
2988 if (!isSuitableForMask(MI, SrcReg, CmpMask, false) || isPredicated(*MI)) { in optimizeCompareInstr()
2996 if (!isSuitableForMask(PotentialAND, SrcReg, CmpMask, true) || in optimizeCompareInstr()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 614 int CmpMask, CmpValue; in optimizeCmpInstr() local
615 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
621 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
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