Searched refs:CmpMI (Results 1 – 7 of 7) sorted by relevance
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ConditionOptimizer.cpp | 112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp); 113 void modifyCmp(MachineInstr *CmpMI, const CmpInfo &Info); 114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To, 244 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp() argument 245 unsigned Opc = CmpMI->getOpcode(); in adjustCmp() 257 const int OldImm = (int)CmpMI->getOperand(2).getImm(); in adjustCmp() 271 void AArch64ConditionOptimizer::modifyCmp(MachineInstr *CmpMI, in modifyCmp() argument 278 MachineBasicBlock *const MBB = CmpMI->getParent(); in modifyCmp() 281 BuildMI(*MBB, CmpMI, CmpMI->getDebugLoc(), TII->get(Opc)) in modifyCmp() 282 .add(CmpMI->getOperand(0)) in modifyCmp() [all …]
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H A D | AArch64ConditionalCompares.cpp | 157 MachineInstr *CmpMI; member in __anon6cc3cae00111::SSACCmpConv 187 bool canSpeculateInstrs(MachineBasicBlock *MBB, const MachineInstr *CmpMI); 383 const MachineInstr *CmpMI) { in canSpeculateInstrs() argument 427 if (&I != CmpMI && I.modifiesRegister(AArch64::NZCV, TRI)) { in canSpeculateInstrs() 558 CmpMI = findConvertibleCompare(CmpBB); in canConvert() 559 if (!CmpMI) in canConvert() 562 if (!canSpeculateInstrs(CmpBB, CmpMI)) { in canConvert() 654 switch (CmpMI->getOpcode()) { in convert() 690 MRI->constrainRegClass(CmpMI->getOperand(FirstOp).getReg(), in convert() 692 if (CmpMI->getOperand(FirstOp + 1).isReg()) in convert() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | MVEVPTBlockPass.cpp | 72 MachineBasicBlock::iterator CmpMI = MI; in findVCMPToFoldIntoVPST() local 73 while (CmpMI != MI->getParent()->begin()) { in findVCMPToFoldIntoVPST() 74 --CmpMI; in findVCMPToFoldIntoVPST() 75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST() 77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST() 81 if (CmpMI == MI) in findVCMPToFoldIntoVPST() 83 NewOpcode = VCMPOpcodeToVPT(CmpMI->getOpcode()); in findVCMPToFoldIntoVPST() 88 if (registerDefinedBetween(CmpMI->getOperand(1).getReg(), std::next(CmpMI), in findVCMPToFoldIntoVPST() 91 if (registerDefinedBetween(CmpMI->getOperand(2).getReg(), std::next(CmpMI), in findVCMPToFoldIntoVPST() 94 return &*CmpMI; in findVCMPToFoldIntoVPST()
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H A D | ARMBaseInstrInfo.cpp | 2098 MachineInstr *CmpMI = findCMPToFoldIntoCBZ(LastMI, TRI); in isProfitableToIfCvt() local 2099 if (CmpMI) in isProfitableToIfCvt() 5485 MachineBasicBlock::iterator CmpMI = Br; in findCMPToFoldIntoCBZ() local 5486 while (CmpMI != Br->getParent()->begin()) { in findCMPToFoldIntoCBZ() 5487 --CmpMI; in findCMPToFoldIntoCBZ() 5488 if (CmpMI->modifiesRegister(ARM::CPSR, TRI)) in findCMPToFoldIntoCBZ() 5490 if (CmpMI->readsRegister(ARM::CPSR, TRI)) in findCMPToFoldIntoCBZ() 5496 if (CmpMI->getOpcode() != ARM::tCMPi8 && CmpMI->getOpcode() != ARM::t2CMPri) in findCMPToFoldIntoCBZ() 5498 Register Reg = CmpMI->getOperand(0).getReg(); in findCMPToFoldIntoCBZ() 5500 ARMCC::CondCodes Pred = getInstrPredicate(*CmpMI, PredReg); in findCMPToFoldIntoCBZ() [all …]
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H A D | ARMConstantIslandPass.cpp | 1905 MachineInstr *CmpMI = findCMPToFoldIntoCBZ(Br.MI, TRI); in optimizeThumb2Branches() local 1906 if (!CmpMI || CmpMI->getOpcode() != ARM::tCMPi8) in optimizeThumb2Branches() 1909 ImmCmp.MI = CmpMI; in optimizeThumb2Branches()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 690 auto CmpMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_CMP_EQ_U32)) in lowerInitExec() local 709 LIS->InsertMachineInstrInMaps(*CmpMI); in lowerInitExec()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 4311 auto CmpMI = MIRBuilder.buildInstr(CmpOpc).addUse(LHS); in emitFPCompare() local 4313 CmpMI.addUse(RHS); in emitFPCompare() 4314 constrainSelectedInstRegOperands(*CmpMI, TII, TRI, RBI); in emitFPCompare() 4315 return &*CmpMI; in emitFPCompare()
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