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Searched refs:CWL (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/
H A Dnouveau_nvkm_subdev_fb_sddr3.c78 int CWL, CL, WR, DLL = 0, ODT = 0; in nvkm_sddr3_calc() local
88 CWL = ram->next->bios.timing_10_CWL; in nvkm_sddr3_calc()
94 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; in nvkm_sddr3_calc()
106 CWL = ramxlat(ramddr3_cwl, CWL); in nvkm_sddr3_calc()
109 if (CL < 0 || CWL < 0 || WR < 0) in nvkm_sddr3_calc()
124 ram->mr[2] |= (CWL & 0x07) << 3; in nvkm_sddr3_calc()
H A Dnouveau_nvkm_subdev_fb_gddr3.c78 int CL, WR, CWL, DLL = 0, ODT = 0, RON, hi; in nvkm_gddr3_calc() local
82 CWL = ram->next->bios.timing_10_CWL; in nvkm_gddr3_calc()
90 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; in nvkm_gddr3_calc()
109 if (CL < 0 || CWL < 1 || CWL > 7 || WR < 0) in nvkm_gddr3_calc()
113 ram->mr[0] |= (CWL & 0x07) << 9; in nvkm_gddr3_calc()
H A Dnouveau_nvkm_subdev_fb_ramnv50.c91 switch ((!T(CWL)) * ram->base.type) { in nv50_ram_timing_calc()
93 T(CWL) = T(CL) - 1; in nv50_ram_timing_calc()
96 T(CWL) = ((cur2 & 0xff000000) >> 24) + 1; in nv50_ram_timing_calc()
103 timing[6] = (0x2d + T(CL) - T(CWL) + in nv50_ram_timing_calc()
105 T(CWL) << 8 | in nv50_ram_timing_calc()
106 (0x2f + T(CL) - T(CWL)); in nv50_ram_timing_calc()
109 timing[6] = (0x2b + T(CL) - T(CWL)) << 16 | in nv50_ram_timing_calc()
110 max_t(s8, T(CWL) - 2, 1) << 8 | in nv50_ram_timing_calc()
111 (0x2e + T(CL) - T(CWL)); in nv50_ram_timing_calc()
115 timing[1] = (T(WR) + 1 + T(CWL)) << 24 | in nv50_ram_timing_calc()
[all …]
H A Dnouveau_nvkm_subdev_fb_ramgt215.c367 switch ((!T(CWL)) * ram->base.type) { in gt215_ram_timing_calc()
369 T(CWL) = T(CL) - 1; in gt215_ram_timing_calc()
372 T(CWL) = ((cur2 & 0xff000000) >> 24) + 1; in gt215_ram_timing_calc()
380 timing[1] = (T(WR) + 1 + T(CWL)) << 24 | in gt215_ram_timing_calc()
382 (T(WTR) + 1 + T(CWL)) << 8 | in gt215_ram_timing_calc()
383 (5 + T(CL) - T(CWL)); in gt215_ram_timing_calc()
384 timing[2] = (T(CWL) - 1) << 24 | in gt215_ram_timing_calc()
398 max_t(u8, (T(CWL) + 6), (T(CL) + 2)) << 8 | in gt215_ram_timing_calc()
401 max_t(u8, 1, (6 - T(CL) + T(CWL))) << 8 | in gt215_ram_timing_calc()
402 (0x50 + T(CL) - T(CWL)); in gt215_ram_timing_calc()
/netbsd-src/share/misc/
H A Dairport1601 CWL:Cardiff (Rhoose), Wales, UK